Xin Yuan

Person

Williston, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Systems and methods for fixing pin mismatch in layout migration
- Patent number 8,627,247
- Issue date Jan 7, 2014
- International Business Machines Corporation
- Kevin W. McCullen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel solving of layout optimization
- Patent number 8,555,229
- Issue date Oct 8, 2013
- International Business Machines Corporation
- Xiaoping Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decomposing layout for triple patterning lithography
- Patent number 8,484,607
- Issue date Jul 9, 2013
- International Business Machines Corporation
- Xiaoping Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technology migration for integrated circuits with radical design re...
- Patent number 8,464,189
- Issue date Jun 11, 2013
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods to obtain a feasible integer solution in a hierarchical cir...
- Patent number 8,302,062
- Issue date Oct 30, 2012
- International Business Machines Corporation
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handling two-dimensional constraints in integrated circuit layout
- Patent number 8,296,706
- Issue date Oct 23, 2012
- International Business Machines Corporation
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
VLSI artwork legalization for hierarchical designs with multiple gr...
- Patent number 7,962,879
- Issue date Jun 14, 2011
- International Business Machines Corporation
- Xiaoping Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive weighting method for layout optimization with multiple pri...
- Patent number 7,895,562
- Issue date Feb 22, 2011
- International Business Machines Corporation
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Obtaining a feasible integer solution in a hierarchical circuit lay...
- Patent number 7,761,818
- Issue date Jul 20, 2010
- International Business Machines Corporation
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technology migration for integrated circuits with radical design re...
- Patent number 7,761,821
- Issue date Jul 20, 2010
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Context aware sub-circuit layout modification
- Patent number 7,735,042
- Issue date Jun 8, 2010
- International Business Machines Corporation
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technology migration for integrated circuits with radical design re...
- Patent number 7,610,565
- Issue date Oct 27, 2009
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Independent migration of hierarchical designs with methods of findi...
- Patent number 7,568,173
- Issue date Jul 28, 2009
- International Business Machines Corporation
- Veit Gernhoefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Minimum layout perturbation-based artwork legalization with grid co...
- Patent number 7,484,197
- Issue date Jan 27, 2009
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
VLSI artwork legalization for hierarchical designs with multiple gr...
- Patent number 7,437,691
- Issue date Oct 14, 2008
- International Business Machines Corporation
- Xiaoping Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technology migration for integrated circuits with radical design re...
- Patent number 7,302,651
- Issue date Nov 27, 2007
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technology migration for integrated circuits with radical design re...
- Patent number 7,257,783
- Issue date Aug 14, 2007
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SYSTEMS AND METHODS FOR FIXING PIN MISMATCH IN LAYOUT MIGRATION
- Publication number 20140019931
- Publication date Jan 16, 2014
- International Business Machines Corporation
- Kevin W. MCCULLEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL SOLVING OF LAYOUT OPTIMIZATION
- Publication number 20120311517
- Publication date Dec 6, 2012
- International Business Machines Corporation
- Xiaoping Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HANDLING TWO-DIMENSIONAL CONSTRAINTS IN INTEGRATED CIRCUIT LAYOUT
- Publication number 20110265055
- Publication date Oct 27, 2011
- International Business Machines Corporation
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...
- Publication number 20100185997
- Publication date Jul 22, 2010
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS TO OBTAIN A FEASIBLE INTEGER SOLUTION IN A HIERARCHICAL CIR...
- Publication number 20100153892
- Publication date Jun 17, 2010
- International Business Machines Corporation
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE WEIGHTING METHOD FOR LAYOUT OPTIMIZATION WITH MULTIPLE PRI...
- Publication number 20090158223
- Publication date Jun 18, 2009
- International Business Machines Corporation
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTEXT AWARE SUB-CIRCUIT LAYOUT MODIFICATION
- Publication number 20090037851
- Publication date Feb 5, 2009
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POLYGONAL AREA DESIGN RULE CORRECTION METHOD FOR VLSI LAYOUTS
- Publication number 20090037850
- Publication date Feb 5, 2009
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OBTAINING A FEASIBLE INTEGER SOLUTION IN A HIERARCHICAL CIRCUIT LAY...
- Publication number 20090031259
- Publication date Jan 29, 2009
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VLSI ARTWORK LEGALIZATION FOR HIERARCHICAL DESIGNS WITH MULTIPLE GR...
- Publication number 20080313577
- Publication date Dec 18, 2008
- International Business Machines Corporation
- Xiaoping TANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INDEPENDENT MIGRATION OF HIERARCHICAL DESIGNS WITH METHODS OF FINDI...
- Publication number 20080313581
- Publication date Dec 18, 2008
- International Business Machines Corporation
- Veit Gernhoefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF OPTIMIZING HIERARCHICAL VERY LARGE SCALE INTEGRATION (VLS...
- Publication number 20080172638
- Publication date Jul 17, 2008
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...
- Publication number 20070277129
- Publication date Nov 29, 2007
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VLSI ARTWORK LEGALIZATION FOR HIERARCHICAL DESIGNS WITH MULTIPLE GR...
- Publication number 20070240088
- Publication date Oct 11, 2007
- Xiaoping Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...
- Publication number 20070198961
- Publication date Aug 23, 2007
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...
- Publication number 20060101357
- Publication date May 11, 2006
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...
- Publication number 20060101356
- Publication date May 11, 2006
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Systems and methods for fixing pin mismatch in layout migration

Parallel solving of layout optimization

Decomposing layout for triple patterning lithography

Technology migration for integrated circuits with radical design re...

Methods to obtain a feasible integer solution in a hierarchical cir...

Handling two-dimensional constraints in integrated circuit layout

VLSI artwork legalization for hierarchical designs with multiple gr...

Adaptive weighting method for layout optimization with multiple pri...

Obtaining a feasible integer solution in a hierarchical circuit lay...

Technology migration for integrated circuits with radical design re...

Context aware sub-circuit layout modification

Technology migration for integrated circuits with radical design re...

Independent migration of hierarchical designs with methods of findi...

Minimum layout perturbation-based artwork legalization with grid co...

VLSI artwork legalization for hierarchical designs with multiple gr...

Technology migration for integrated circuits with radical design re...

Technology migration for integrated circuits with radical design re...

Patents Applicationslast 30 patents

SYSTEMS AND METHODS FOR FIXING PIN MISMATCH IN LAYOUT MIGRATION

PARALLEL SOLVING OF LAYOUT OPTIMIZATION

HANDLING TWO-DIMENSIONAL CONSTRAINTS IN INTEGRATED CIRCUIT LAYOUT

TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...

METHODS TO OBTAIN A FEASIBLE INTEGER SOLUTION IN A HIERARCHICAL CIR...

ADAPTIVE WEIGHTING METHOD FOR LAYOUT OPTIMIZATION WITH MULTIPLE PRI...

CONTEXT AWARE SUB-CIRCUIT LAYOUT MODIFICATION

POLYGONAL AREA DESIGN RULE CORRECTION METHOD FOR VLSI LAYOUTS

OBTAINING A FEASIBLE INTEGER SOLUTION IN A HIERARCHICAL CIRCUIT LAY...

VLSI ARTWORK LEGALIZATION FOR HIERARCHICAL DESIGNS WITH MULTIPLE GR...

INDEPENDENT MIGRATION OF HIERARCHICAL DESIGNS WITH METHODS OF FINDI...

METHOD OF OPTIMIZING HIERARCHICAL VERY LARGE SCALE INTEGRATION (VLS...

TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...

VLSI ARTWORK LEGALIZATION FOR HIERARCHICAL DESIGNS WITH MULTIPLE GR...

TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...

TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...

TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...