Xinghui Duan

Person

Shanghai, CN

People

Patents Grantslast 30 patents

Information Patent Grant
Mobile storage random read performance estimation enhancements
- Patent number 11,989,456
- Issue date May 21, 2024
- Micron Technology, Inc.
- David Aaron Palmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
NAND logical-to-physical table region tracking
- Patent number 11,922,053
- Issue date Mar 5, 2024
- Eric Kwok Fung Yuen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory mapping device and method
- Patent number 11,922,012
- Issue date Mar 5, 2024
- Micron Technology, Inc.
- Xinghui Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pre-load techniques for improved sequential memory access in a memo...
- Patent number 11,868,245
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Xinghui Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable width superblock addressing
- Patent number 11,740,819
- Issue date Aug 29, 2023
- Micron Technology, Inc.
- Zhao Cui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data removal marking in a memory device
- Patent number 11,720,278
- Issue date Aug 8, 2023
- Micron Technology, Inc.
- Huachen Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scheme to improve efficiency of device garbage collection in memory...
- Patent number 11,720,489
- Issue date Aug 8, 2023
- Micron Technology, Inc.
- Xinghui Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling NAND operation latency
- Patent number 11,663,120
- Issue date May 30, 2023
- Micron Technology, Inc.
- Giuseppe D'Eliseo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SLC cache allocation
- Patent number 11,620,216
- Issue date Apr 4, 2023
- Micron Technology, Inc.
- Xinghui Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduce system active power based on memory usage patterns
- Patent number 11,604,607
- Issue date Mar 14, 2023
- Micron Technology, Inc.
- Xinghui Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scheme to improve efficiency of garbage collection in cached flash...
- Patent number 11,455,245
- Issue date Sep 27, 2022
- Micron Technology, Inc.
- Xinghui Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data removal marking in a memory device
- Patent number 11,409,462
- Issue date Aug 9, 2022
- Micron Technology, Inc.
- Huachen Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronizing NAND logical-to-physical table region tracking
- Patent number 11,341,041
- Issue date May 24, 2022
- Micron Technology, Inc.
- Zhao Cui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SLC cache allocation
- Patent number 11,341,048
- Issue date May 24, 2022
- Micron Technology, Inc.
- Xinghui Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
NAND logical-to-physical table region tracking
- Patent number 11,269,545
- Issue date Mar 8, 2022
- Micron Technology, Inc.
- Eric Kwok Fung Yuen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling NAND operation latency
- Patent number 11,169,917
- Issue date Nov 9, 2021
- Micron Technology, Inc.
- Giuseppe D'Eliseo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable width superblock addressing
- Patent number 11,132,136
- Issue date Sep 28, 2021
- Micron Technology, Inc.
- Zhao Cui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduce system active power based on memory usage patterns
- Patent number 11,029,883
- Issue date Jun 8, 2021
- Micron Technology, Inc.
- Xinghui Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronizing NAND logical-to-physical table region tracking
- Patent number 10,725,904
- Issue date Jul 28, 2020
- Micron Technology, Inc.
- Zhao Cui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling NAND operation latency
- Patent number 10,552,316
- Issue date Feb 4, 2020
- Micron Technology, Inc.
- Giuseppe D'Eliseo
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
NAND LOGICAL-TO-PHYSICAL TABLE REGION TRACKING
- Publication number 20240248639
- Publication date Jul 25, 2024
- Lodestar Licensing Group, LLC
- Eric Kwok Fung Yuen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCHEME TO IMPROVE EFFICIENCY OF DEVICE GARBAGE COLLECTION IN MEMORY...
- Publication number 20220414003
- Publication date Dec 29, 2022
- Micron Technology, Inc.
- Xinghui Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MOBILE STORAGE RANDOM READ PERFORMANCE ESTIMATION ENHANCEMENTS
- Publication number 20220382487
- Publication date Dec 1, 2022
- Micron Technology, Inc.
- David Aaron Palmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MAPPING DEVICE AND METHOD
- Publication number 20220382453
- Publication date Dec 1, 2022
- Micron Technology, Inc.
- Xinghui Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA REMOVAL MARKING IN A MEMORY DEVICE
- Publication number 20220357877
- Publication date Nov 10, 2022
- Micron Technology, Inc.
- Huachen Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRE-LOAD TECHNIQUES FOR IMPROVED SEQUENTIAL MEMORY ACCESS IN A MEMO...
- Publication number 20220300409
- Publication date Sep 22, 2022
- Micron Technology, Inc.
- Xinghui Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SLC CACHE ALLOCATION
- Publication number 20220283939
- Publication date Sep 8, 2022
- Micron Technology, Inc.
- Xinghui Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NAND LOGICAL-TO-PHYSICAL TABLE REGION TRACKING
- Publication number 20220188018
- Publication date Jun 16, 2022
- Micron Technology, Inc.
- Eric Kwok Fung Yuen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLING NAND OPERATION LATENCY
- Publication number 20220066926
- Publication date Mar 3, 2022
- Micron Technology, Inc.
- Giuseppe D'Eliseo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE WIDTH SUPERBLOCK ADDRESSING
- Publication number 20220011936
- Publication date Jan 13, 2022
- Micron Technology, Inc.
- Zhao Cui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA REMOVAL MARKING IN A MEMORY DEVICE
- Publication number 20210405918
- Publication date Dec 30, 2021
- Huachen Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SLC CACHE ALLOCATION
- Publication number 20210334211
- Publication date Oct 28, 2021
- Micron Technology, Inc.
- Xinghui DUAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCE SYSTEM ACTIVE POWER BASED ON MEMORY USAGE PATTERNS
- Publication number 20210279010
- Publication date Sep 9, 2021
- Micron Technology, Inc.
- Xinghui Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCHEME TO IMPROVE EFFICIENCY OF GARBAGE COLLECTION IN CACHED FLASH...
- Publication number 20210182189
- Publication date Jun 17, 2021
- Micron Technology, Inc.
- Xinghui Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE WIDTH SUPERBLOCK ADDRESSING
- Publication number 20210181940
- Publication date Jun 17, 2021
- Micron Technology, Inc.
- Zhao Cui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NAND LOGICAL-TO-PHYSICAL TABLE REGION TRACKING
- Publication number 20210141557
- Publication date May 13, 2021
- Eric Kwok Fung Yuen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNCHRONIZING NAND LOGICAL-TO-PHYSICAL TABLE REGION TRACKING
- Publication number 20200356472
- Publication date Nov 12, 2020
- Micron Technology, Inc.
- Zhao Cui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCE SYSTEM ACTIVE POWER BASED ON MEMORY USAGE PATTERNS
- Publication number 20200233606
- Publication date Jul 23, 2020
- Micron Technology, Inc.
- Xinghui Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLING NAND OPERATION LATENCY
- Publication number 20200226059
- Publication date Jul 16, 2020
- Micron Technology, Inc.
- Giuseppe D'Eliseo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNCHRONIZING NAND LOGICAL-TO-PHYSICAL TABLE REGION TRACKING
- Publication number 20200142821
- Publication date May 7, 2020
- Zhao Cui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLING NAND OPERATION LATENCY
- Publication number 20200004673
- Publication date Jan 2, 2020
- Micron Technology, Inc.
- Giuseppe D'Eliseo
- G06 - COMPUTING CALCULATING COUNTING

Xinghui Duan

Person

Patents Grantslast 30 patents

Mobile storage random read performance estimation enhancements

NAND logical-to-physical table region tracking

Memory mapping device and method

Pre-load techniques for improved sequential memory access in a memo...

Variable width superblock addressing

Data removal marking in a memory device

Scheme to improve efficiency of device garbage collection in memory...

Controlling NAND operation latency

SLC cache allocation

Reduce system active power based on memory usage patterns

Scheme to improve efficiency of garbage collection in cached flash...

Data removal marking in a memory device

Synchronizing NAND logical-to-physical table region tracking

SLC cache allocation

NAND logical-to-physical table region tracking

Controlling NAND operation latency

Variable width superblock addressing

Reduce system active power based on memory usage patterns

Synchronizing NAND logical-to-physical table region tracking

Controlling NAND operation latency

Patents Applicationslast 30 patents

NAND LOGICAL-TO-PHYSICAL TABLE REGION TRACKING

SCHEME TO IMPROVE EFFICIENCY OF DEVICE GARBAGE COLLECTION IN MEMORY...

MOBILE STORAGE RANDOM READ PERFORMANCE ESTIMATION ENHANCEMENTS

MEMORY MAPPING DEVICE AND METHOD

DATA REMOVAL MARKING IN A MEMORY DEVICE

PRE-LOAD TECHNIQUES FOR IMPROVED SEQUENTIAL MEMORY ACCESS IN A MEMO...

SLC CACHE ALLOCATION

NAND LOGICAL-TO-PHYSICAL TABLE REGION TRACKING

CONTROLLING NAND OPERATION LATENCY

VARIABLE WIDTH SUPERBLOCK ADDRESSING

DATA REMOVAL MARKING IN A MEMORY DEVICE

SLC CACHE ALLOCATION

REDUCE SYSTEM ACTIVE POWER BASED ON MEMORY USAGE PATTERNS

SCHEME TO IMPROVE EFFICIENCY OF GARBAGE COLLECTION IN CACHED FLASH...

VARIABLE WIDTH SUPERBLOCK ADDRESSING

NAND LOGICAL-TO-PHYSICAL TABLE REGION TRACKING

SYNCHRONIZING NAND LOGICAL-TO-PHYSICAL TABLE REGION TRACKING

REDUCE SYSTEM ACTIVE POWER BASED ON MEMORY USAGE PATTERNS

CONTROLLING NAND OPERATION LATENCY

SYNCHRONIZING NAND LOGICAL-TO-PHYSICAL TABLE REGION TRACKING

CONTROLLING NAND OPERATION LATENCY