Xunqing Shi

Person

Fanling, HK

People

Patents Grantslast 30 patents

Information Patent Grant
Method for optimizing electrodeposition process of a plurality of v...
- Patent number 9,075,941
- Issue date Jul 7, 2015
- Hong Kong Applied Science and Technology Research Institute Company Limited
- Yaofeng Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partitioned hybrid substrate for radio frequency applications
- Patent number 9,066,424
- Issue date Jun 23, 2015
- Hong Kong Applied Science and Technology Research Institute Company Limited
- Dan Yang
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Increased surface area electrical contacts for microelectronic pack...
- Patent number 8,772,930
- Issue date Jul 8, 2014
- Hong Kong Applied Science and Technology Research Institute Company Limited
- Pui Chung Simon Law
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor chip with through-silicon-via and sidewall pad
- Patent number 8,674,482
- Issue date Mar 18, 2014
- Hong Kong Applied Science and Technology Research Institute Co. Ltd.
- Xunqing Shi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via and method of via forming and method of via filling
- Patent number 8,232,626
- Issue date Jul 31, 2012
- Hong Kong Applied Science and Technology Research Institute Co. Ltd.
- Yat Kit Tsui
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High optical efficiency CMOS image sensor
- Patent number 8,212,297
- Issue date Jul 3, 2012
- Hong Kong Applied Science and Technology Research Institute Company Limited
- Pui Chung Simon Law
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic package with stacked modules with channels passing throu...
- Patent number 8,194,411
- Issue date Jun 5, 2012
- Hong Kong Applied Science and Technology Research Institute Co. Ltd.
- Chi Kuen Vincent Leung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonding method for through-silicon-via based 3D wafer stacking
- Patent number 8,030,208
- Issue date Oct 4, 2011
- Hong Kong Applied Science and Technology Research Institute Company Limited
- Chi Kuen Vincent Leung
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Substrate warpage-reducing structure
- Patent number 7,879,438
- Issue date Feb 1, 2011
- Hong Kong Applied Science and Technology Research Institute Co., Ltd.
- Jyh-Rong Lin
- C04 - CEMENTS CONCRETE ARTIFICIAL STONE CERAMICS REFRACTORIES

Patents Applicationslast 30 patents

Information Patent Application
Partitioned Hybrid Substrate for Radio Frequency Applications
- Publication number 20150016078
- Publication date Jan 15, 2015
- Hong Kong Applied Science and Technology Research Institute Company Limited
- Dan YANG
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Method for Optimizing Electrodeposition Process of a Plurality of V...
- Publication number 20140343901
- Publication date Nov 20, 2014
- Hong Kong Applied Science and Technology Research Institute Company Limited
- Yaofeng SUN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INCREASED SURFACE AREA ELECTRICAL CONTACTS FOR MICROELECTRONIC PACK...
- Publication number 20130187267
- Publication date Jul 25, 2013
- Hong Kong Applied Science and Technology Research Institute Company Limited
- Pui Chung Simon LAW
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH OPTICAL EFFICIENCY CMOS IMAGE SENSOR
- Publication number 20120187462
- Publication date Jul 26, 2012
- Hong Kong Applied Science and Technology Research Institute Company Limited
- Pui Chung Simon LAW
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VIA AND METHOD OF VIA FORMING AND METHOD OF VIA FILLING
- Publication number 20110304026
- Publication date Dec 15, 2011
- Yat Kit Tsui
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked Electronic Components, Method and Apparatus for Aligning El...
- Publication number 20110235299
- Publication date Sep 29, 2011
- Chi Kuen Vincent Leung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electronic Device Package and Methods of Manufacturing an Electroni...
- Publication number 20110221018
- Publication date Sep 15, 2011
- Xunqing Shi
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
SUBSTRATE WARPAGE-REDUCING STRUCTURE
- Publication number 20100247879
- Publication date Sep 30, 2010
- Hong Kong Applied Science and Technology Researh Institute Co. Ltd.
- Jyh-Rong Lin
- C04 - CEMENTS CONCRETE ARTIFICIAL STONE CERAMICS REFRACTORIES
Information Patent Application
ELECTRONIC PACKAGE AND METHOD OF FABRICATION THEREOF
- Publication number 20100246141
- Publication date Sep 30, 2010
- Hong Kong Applied Science and Technology Research Institute Co. Ltd. (ASTRI)
- Chi Kuen Vincent Leung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CHIP WITH THROUGH-SILICON-VIA AND SIDEWALL PAD
- Publication number 20100123241
- Publication date May 20, 2010
- Hong Kong Applied Science and Technology Research Institute Co., Ltd.
- Xunqing Shi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BONDING METHOD FOR THROUGH-SILICON-VIA BASED 3D WAFER STACKING
- Publication number 20090294974
- Publication date Dec 3, 2009
- Chi Keun Vincent Leung
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
BONDING METHOD FOR THROUGH-SILICON-VIA BASED 3D WAFER STACKING
- Publication number 20090294916
- Publication date Dec 3, 2009
- Hong Kong Applied Science and Technology Research Institute Company, Ltd.
- Wei Ma
- H01 - BASIC ELECTRIC ELEMENTS

Xunqing Shi

Person

Patents Grantslast 30 patents

Method for optimizing electrodeposition process of a plurality of v...

Partitioned hybrid substrate for radio frequency applications

Increased surface area electrical contacts for microelectronic pack...

Semiconductor chip with through-silicon-via and sidewall pad

Via and method of via forming and method of via filling

High optical efficiency CMOS image sensor

Electronic package with stacked modules with channels passing throu...

Bonding method for through-silicon-via based 3D wafer stacking

Substrate warpage-reducing structure

Patents Applicationslast 30 patents

Partitioned Hybrid Substrate for Radio Frequency Applications

Method for Optimizing Electrodeposition Process of a Plurality of V...

INCREASED SURFACE AREA ELECTRICAL CONTACTS FOR MICROELECTRONIC PACK...

HIGH OPTICAL EFFICIENCY CMOS IMAGE SENSOR

VIA AND METHOD OF VIA FORMING AND METHOD OF VIA FILLING

Stacked Electronic Components, Method and Apparatus for Aligning El...

Electronic Device Package and Methods of Manufacturing an Electroni...

SUBSTRATE WARPAGE-REDUCING STRUCTURE

ELECTRONIC PACKAGE AND METHOD OF FABRICATION THEREOF

SEMICONDUCTOR CHIP WITH THROUGH-SILICON-VIA AND SIDEWALL PAD

BONDING METHOD FOR THROUGH-SILICON-VIA BASED 3D WAFER STACKING

BONDING METHOD FOR THROUGH-SILICON-VIA BASED 3D WAFER STACKING