Yang-Trung Lin

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Method and system for tracing error of logic system design
- Patent number 11,841,761
- Issue date Dec 12, 2023
- XEPIC CORPORATION LIMITED
- Yang-Trung Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for producing sub-optimal routes for a net by...
- Patent number 6,738,960
- Issue date May 18, 2004
- Cadence Design Systems, Inc.
- Steven Teig
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND SYSTEM FOR TRACING ERROR OF LOGIC SYSTEM DESIGN
- Publication number 20230176941
- Publication date Jun 8, 2023
- XEPIC CORPORATION LIMITED
- Yang-Trung LIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for producing sub-optimal routes for a net by...
- Publication number 20030023943
- Publication date Jan 30, 2003
- Steven Teig
- G06 - COMPUTING CALCULATING COUNTING