Yanru Li

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Dynamic prioritization of system-on-chip interconnect traffic using...
- Patent number 11,886,910
- Issue date Jan 30, 2024
- Intel Corporation
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for in-memory device access control
- Patent number 11,636,231
- Issue date Apr 25, 2023
- QUALCOMM Incorporated
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partial refresh technique to save memory refresh power
- Patent number 11,631,450
- Issue date Apr 18, 2023
- QUALCOMM Incorporated
- Jungwon Suh
- G11 - INFORMATION STORAGE
Information Patent Grant
Protected data streaming between memories
- Patent number 11,630,723
- Issue date Apr 18, 2023
- QUALCOMM Incorporated
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partial refresh technique to save memory refresh power
- Patent number 11,164,618
- Issue date Nov 2, 2021
- QUALCOMM Incorporated
- Jungwon Suh
- G11 - INFORMATION STORAGE
Information Patent Grant
Bypassing cache memory in a write transaction in a system with mult...
- Patent number 11,144,467
- Issue date Oct 12, 2021
- Intel Corporation
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Boot time determination of calibration parameters for a component c...
- Patent number 11,126,586
- Issue date Sep 21, 2021
- QUALCOMM Incorporated
- Dhamim Packer Ali
- G05 - CONTROLLING REGULATING
Information Patent Grant
Coincident memory bank access via cross connected shared bank resou...
- Patent number 11,024,361
- Issue date Jun 1, 2021
- QUALCOMM Incorporated
- Yanru Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive power management of dynamic random access memory
- Patent number 10,956,057
- Issue date Mar 23, 2021
- QUALCOMM Incorporated
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective volatile memory refresh via memory-side data valid indica...
- Patent number 10,878,880
- Issue date Dec 29, 2020
- QUALCOMM Incorporated
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read-with-invalidate modified data in a cache line in a cache memory
- Patent number 10,831,658
- Issue date Nov 10, 2020
- Intel Corporation
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Preemptive decompression scheduling for a NAND storage device
- Patent number 10,817,224
- Issue date Oct 27, 2020
- QUALCOMM Incorporated
- Subrato Kumar De
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write access control for double data rate write-x/datacopy0 commands
- Patent number 10,795,830
- Issue date Oct 6, 2020
- QUALCOMM Incorporated
- Dexter Tamio Chun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for booting within a heterogeneous memory environ...
- Patent number 10,783,252
- Issue date Sep 22, 2020
- QUALCOMM Incorporated
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partial refresh technique to save memory refresh power
- Patent number 10,726,904
- Issue date Jul 28, 2020
- QUALCOMM Incorporated
- Jungwon Suh
- G11 - INFORMATION STORAGE
Information Patent Grant
Boot time determination of calibration parameters for a component c...
- Patent number 10,642,781
- Issue date May 5, 2020
- QUALCOMM Incorporated
- Dhamim Packer Ali
- G05 - CONTROLLING REGULATING
Information Patent Grant
Selectable boot CPU
- Patent number 10,599,442
- Issue date Mar 24, 2020
- QUALCOMM Incorporated
- Dhamim Packer Ali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory access management for low-power use cases of a system on chi...
- Patent number 10,591,975
- Issue date Mar 17, 2020
- QUALCOMM Incorporated
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for providing power-efficient file system opera...
- Patent number 10,579,516
- Issue date Mar 3, 2020
- QUALCOMM Incorporated
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for improved error correction in a refreshable...
- Patent number 10,482,943
- Issue date Nov 19, 2019
- QUALCOMM Incorporated
- Dexter Chun
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Non-volatile random access memory with gated security access
- Patent number 10,387,333
- Issue date Aug 20, 2019
- QUALCOMM Incorporated
- Dexter Chun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic mapping of applications on NVRAM/DRAM hybrid memory
- Patent number 10,338,837
- Issue date Jul 2, 2019
- QUALCOMM Incorporated
- Subrato Kumar De
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partial refresh technique to save memory refresh power
- Patent number 10,332,582
- Issue date Jun 25, 2019
- QUALCOMM Incorporated
- Jungwon Suh
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for memory power saving via kernel steering to...
- Patent number 10,310,757
- Issue date Jun 4, 2019
- QUALCOMM Incorporated
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for virtualized control of a shared system cache
- Patent number 10,180,908
- Issue date Jan 15, 2019
- QUALCOMM Incorporated
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for optimizing memory power consumption in a he...
- Patent number 10,157,008
- Issue date Dec 18, 2018
- QUALCOMM Incorporated
- Dexter Tamio Chun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for a shared cache with dynamic partitioning
- Patent number 10,089,238
- Issue date Oct 2, 2018
- QUALCOMM Incorporated
- Subbarao Palacharla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for reducing memory power consumption via pre-f...
- Patent number 10,090,040
- Issue date Oct 2, 2018
- QUALCOMM Incorporated
- Dexter Chun
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for implementing error correcting code regions...
- Patent number 9,983,930
- Issue date May 29, 2018
- QUALCOMM Incorporated
- Nhon Quach
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems, methods, and computer programs for resolving dram defects
- Patent number 9,928,924
- Issue date Mar 27, 2018
- QUALCOMM Incorporated
- Dexter Tamio Chun
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Using Memory Protection Data
- Publication number 20240232438
- Publication date Jul 11, 2024
- Google LLC
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Using Memory Protection Data
- Publication number 20240135042
- Publication date Apr 25, 2024
- Google LLC
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCESS CONTROL FOR PROTECTION OF IN-MEMORY COMPUTATION
- Publication number 20220269439
- Publication date Aug 25, 2022
- QUALCOMM Incorporated
- DEXTER TAMIO CHUN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROTECTED DATA STREAMING BETWEEN MEMORIES
- Publication number 20220222137
- Publication date Jul 14, 2022
- QUALCOMM Incorporated
- YANRU LI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods And Apparatus For In-Memory Device Access Control
- Publication number 20220027520
- Publication date Jan 27, 2022
- QUALCOMM Incorporated
- YANRU LI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIAL REFRESH TECHNIQUE TO SAVE MEMORY REFRESH POWER
- Publication number 20210343331
- Publication date Nov 4, 2021
- QUALCOMM Incorporated
- Jungwon SUH
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC PRIORITIZATION OF SYSTEM-ON-CHIP INTERCONNECT TRAFFIC USING...
- Publication number 20210200579
- Publication date Jul 1, 2021
- Intel Corporation
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREAD SCHEDULING BASED ON PERFORMANCE METRIC INFORMATION
- Publication number 20210124615
- Publication date Apr 29, 2021
- THOMAS KLINGENBRUNN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIAL REFRESH TECHNIQUE TO SAVE MEMORY REFRESH POWER
- Publication number 20200321051
- Publication date Oct 8, 2020
- QUALCOMM Incorporated
- Jungwon SUH
- G11 - INFORMATION STORAGE
Information Patent Application
BOOT TIME DETERMINATION OF CALIBRATION PARAMETERS FOR A COMPONENT C...
- Publication number 20200257650
- Publication date Aug 13, 2020
- QUALCOMM Incorporated
- Dhamim PACKER ALI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE VOLATILE MEMORY REFRESH VIA MEMORY-SIDE DATA VALID INDICA...
- Publication number 20200098420
- Publication date Mar 26, 2020
- QUALCOMM Incorporated
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE POWER MANAGEMENT OF DYNAMIC RANDOM ACCESS MEMORY
- Publication number 20200073561
- Publication date Mar 5, 2020
- QUALCOMM Incorporated
- YANRU LI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WRITE ACCESS CONTROL FOR DOUBLE DATA RATE WRITE-X/DATACOPY0 COMMANDS
- Publication number 20200026667
- Publication date Jan 23, 2020
- QUALCOMM Incorporated
- DEXTER TAMIO CHUN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BYPASSING CACHE MEMORY IN A WRITE TRANSACTION IN A SYSTEM WITH MULT...
- Publication number 20190272236
- Publication date Sep 5, 2019
- Intel Corporation
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIAL REFRESH TECHNIQUE TO SAVE MEMORY REFRESH POWER
- Publication number 20190221252
- Publication date Jul 18, 2019
- QUALCOMM Incorporated
- Jungwon SUH
- G11 - INFORMATION STORAGE
Information Patent Application
READ-WITH-INVALIDATE MODIFIED DATA IN A CACHE LINE IN A CACHE MEMORY
- Publication number 20190138448
- Publication date May 9, 2019
- Intel Corporation
- Yanru LI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ACCESS MANAGEMENT FOR LOW-POWER USE CASES OF A SYSTEM ON CHI...
- Publication number 20190129493
- Publication date May 2, 2019
- QUALCOMM Incorporated
- YANRU LI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR MEMORY POWER SAVING VIA KERNEL STEERING TO...
- Publication number 20190065087
- Publication date Feb 28, 2019
- QUALCOMM Incorporated
- YANRU LI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System And Method For Booting Within A Heterogeneous Memory Environ...
- Publication number 20190065752
- Publication date Feb 28, 2019
- QUALCOMM Incorporated
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIAL REFRESH TECHNIQUE TO SAVE MEMORY REFRESH POWER
- Publication number 20190043558
- Publication date Feb 7, 2019
- QUALCOMM Incorporated
- Jungwon SUH
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS FOR IMPROVED ERROR CORRECTION IN A REFRESHABLE...
- Publication number 20190006001
- Publication date Jan 3, 2019
- QUALCOMM Incorporated
- DEXTER CHUN
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS FOR SECURELY BOOTING A SYSTEM ON CHIP VIA A VIR...
- Publication number 20180365425
- Publication date Dec 20, 2018
- QUALCOMM Incorporated
- DHAMIM PACKER ALI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BOOT TIME DETERMINATION OF CALIBRATION PARAMETERS FOR A COMPONENT C...
- Publication number 20180293204
- Publication date Oct 11, 2018
- QUALCOMM Incorporated
- Dhamim PACKER ALI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR REDUCING MEMORY POWER CONSUMPTION VIA PRE-F...
- Publication number 20180286473
- Publication date Oct 4, 2018
- QUALCOMM Incorporated
- DEXTER CHUN
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS FOR PROVIDING POWER-EFFICIENT FILE SYSTEM OPERA...
- Publication number 20180260320
- Publication date Sep 13, 2018
- QUALCOMM Incorporated
- Yanru Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTABLE BOOT CPU
- Publication number 20180253314
- Publication date Sep 6, 2018
- QUALCOMM Incorporated
- Dhamim PACKER ALI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COINCIDENT MEMORY BANK ACCESS VIA CROSS CONNECTED SHARED BANK RESOU...
- Publication number 20180197594
- Publication date Jul 12, 2018
- QUALCOMM Incorporated
- Yanru Li
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE RANDOM ACCESS MEMORY WITH GATED SECURITY ACCESS
- Publication number 20180189195
- Publication date Jul 5, 2018
- QUALCOMM Incorporated
- DEXTER CHUN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR IMPLEMENTING ERROR CORRECTING CODE REGIONS...
- Publication number 20180032394
- Publication date Feb 1, 2018
- QUALCOMM Incorporated
- NHON QUACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE FLASH MEMORY COMPRESSION/DECOMPRESSION USING A STORAGE US...
- Publication number 20170371593
- Publication date Dec 28, 2017
- QUALCOMM Incorporated
- YANRU LI
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Dynamic prioritization of system-on-chip interconnect traffic using...

Methods and apparatus for in-memory device access control

Partial refresh technique to save memory refresh power

Protected data streaming between memories

Partial refresh technique to save memory refresh power

Bypassing cache memory in a write transaction in a system with mult...

Boot time determination of calibration parameters for a component c...

Coincident memory bank access via cross connected shared bank resou...

Adaptive power management of dynamic random access memory

Selective volatile memory refresh via memory-side data valid indica...

Read-with-invalidate modified data in a cache line in a cache memory

Preemptive decompression scheduling for a NAND storage device

Write access control for double data rate write-x/datacopy0 commands

System and method for booting within a heterogeneous memory environ...

Partial refresh technique to save memory refresh power

Boot time determination of calibration parameters for a component c...

Selectable boot CPU

Memory access management for low-power use cases of a system on chi...

Systems and methods for providing power-efficient file system opera...

Systems and methods for improved error correction in a refreshable...

Non-volatile random access memory with gated security access

Dynamic mapping of applications on NVRAM/DRAM hybrid memory

Partial refresh technique to save memory refresh power

Systems and methods for memory power saving via kernel steering to...

Method and apparatus for virtualized control of a shared system cache

Systems and methods for optimizing memory power consumption in a he...

Method and apparatus for a shared cache with dynamic partitioning

Systems and methods for reducing memory power consumption via pre-f...

Systems and methods for implementing error correcting code regions...

Systems, methods, and computer programs for resolving dram defects

Patents Applicationslast 30 patents

Using Memory Protection Data

Using Memory Protection Data

ACCESS CONTROL FOR PROTECTION OF IN-MEMORY COMPUTATION

PROTECTED DATA STREAMING BETWEEN MEMORIES

Methods And Apparatus For In-Memory Device Access Control

PARTIAL REFRESH TECHNIQUE TO SAVE MEMORY REFRESH POWER

DYNAMIC PRIORITIZATION OF SYSTEM-ON-CHIP INTERCONNECT TRAFFIC USING...

THREAD SCHEDULING BASED ON PERFORMANCE METRIC INFORMATION

PARTIAL REFRESH TECHNIQUE TO SAVE MEMORY REFRESH POWER

BOOT TIME DETERMINATION OF CALIBRATION PARAMETERS FOR A COMPONENT C...

SELECTIVE VOLATILE MEMORY REFRESH VIA MEMORY-SIDE DATA VALID INDICA...

ADAPTIVE POWER MANAGEMENT OF DYNAMIC RANDOM ACCESS MEMORY

WRITE ACCESS CONTROL FOR DOUBLE DATA RATE WRITE-X/DATACOPY0 COMMANDS

BYPASSING CACHE MEMORY IN A WRITE TRANSACTION IN A SYSTEM WITH MULT...

PARTIAL REFRESH TECHNIQUE TO SAVE MEMORY REFRESH POWER

READ-WITH-INVALIDATE MODIFIED DATA IN A CACHE LINE IN A CACHE MEMORY

MEMORY ACCESS MANAGEMENT FOR LOW-POWER USE CASES OF A SYSTEM ON CHI...

SYSTEMS AND METHODS FOR MEMORY POWER SAVING VIA KERNEL STEERING TO...

System And Method For Booting Within A Heterogeneous Memory Environ...

PARTIAL REFRESH TECHNIQUE TO SAVE MEMORY REFRESH POWER

SYSTEMS AND METHODS FOR IMPROVED ERROR CORRECTION IN A REFRESHABLE...

SYSTEMS AND METHODS FOR SECURELY BOOTING A SYSTEM ON CHIP VIA A VIR...

BOOT TIME DETERMINATION OF CALIBRATION PARAMETERS FOR A COMPONENT C...

SYSTEMS AND METHODS FOR REDUCING MEMORY POWER CONSUMPTION VIA PRE-F...

SYSTEMS AND METHODS FOR PROVIDING POWER-EFFICIENT FILE SYSTEM OPERA...

SELECTABLE BOOT CPU

COINCIDENT MEMORY BANK ACCESS VIA CROSS CONNECTED SHARED BANK RESOU...

NON-VOLATILE RANDOM ACCESS MEMORY WITH GATED SECURITY ACCESS

SYSTEMS AND METHODS FOR IMPLEMENTING ERROR CORRECTING CODE REGIONS...

SELECTIVE FLASH MEMORY COMPRESSION/DECOMPRESSION USING A STORAGE US...