Yasuhiko Tsukikawa

Person

Tokyo, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor memory device
- Patent number 11,200,945
- Issue date Dec 14, 2021
- Zentel Japan Corporation
- Takashi Kubo
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device comprising an interface conforming to J...
- Patent number 10,991,418
- Issue date Apr 27, 2021
- Zentel Japan Corporation
- Masaru Haraguchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device and level conversion circuit
- Patent number 7,288,965
- Issue date Oct 30, 2007
- Renesas Technology Corp.
- Kyoji Yamasaki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device and level conversion circuit
- Patent number 7,161,387
- Issue date Jan 9, 2007
- Renesas Technology Corp.
- Kyoji Yamasaki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor memory device driven with low voltage
- Patent number 7,102,935
- Issue date Sep 5, 2006
- Renesas Technology Corp.
- Takeo Miki
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having dummy word line
- Patent number 7,072,204
- Issue date Jul 4, 2006
- Renesas Technology Corp.
- Yasuhiko Tsukikawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device with reduced terminal input capacitance
- Patent number 6,934,204
- Issue date Aug 23, 2005
- Renesas Technology Corp.
- Takashi Itou
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having twin-cell units
- Patent number 6,903,961
- Issue date Jun 7, 2005
- Renesas Technology Corp.
- Yasuhiko Tsukikawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with memory cells arranged in high density
- Patent number 6,867,994
- Issue date Mar 15, 2005
- Renesas Technology Corp.
- Yasuhiko Tsukikawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with shortened connection length among...
- Patent number 6,787,859
- Issue date Sep 7, 2004
- Renesas Technology Corp.
- Takashi Itou
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory circuit having normal operation mode and burn-...
- Patent number 6,735,133
- Issue date May 11, 2004
- Renesas Technology Corp.
- Yasuhiko Tsukikawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Configuration for generating a clock including a delay circuit and...
- Patent number 6,727,738
- Issue date Apr 27, 2004
- Renesas Technology Corp.
- Yasuhiko Tsukikawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having nonvolatile memory cell of high...
- Patent number 6,717,841
- Issue date Apr 6, 2004
- Renesas Technology Corp.
- Yasuhiko Tsukikawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-valued logical circuit with less latch-up
- Patent number 6,700,406
- Issue date Mar 2, 2004
- Mitsubishi Denki Kabushiki Kaisha
- Yasuhiko Tsukikawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor memory device capable of switching output data width
- Patent number 6,687,174
- Issue date Feb 3, 2004
- Renesas Technology Corp.
- Yukiko Maruyama
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device capable of switching output data width
- Patent number 6,535,412
- Issue date Mar 18, 2003
- Mitsubishi Denki Kabushiki Kaisha
- Yukiko Maruyama
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device capable of reducing power supply voltag...
- Patent number 6,469,952
- Issue date Oct 22, 2002
- Mitsubishi Denki Kabushiki Kaisha
- Yasuhiko Tsukikawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with write driver reset function
- Patent number 6,304,496
- Issue date Oct 16, 2001
- Mitsubishi Denki Kabishiki Kaisha
- Yasuhiko Tsukikawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device provided with I/O clamp circuit
- Patent number 6,285,602
- Issue date Sep 4, 2001
- Mitsubishi Denki Kabushiki Kaisha
- Susumu Tanida
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with test mode decision circuit
- Patent number 6,269,038
- Issue date Jul 31, 2001
- Mitsubishi Denki Kabushiki Kaisha
- Takashi Itou
- G11 - INFORMATION STORAGE
Information Patent Grant
Data output circuit that can drive output data speedily and semicon...
- Patent number 6,249,462
- Issue date Jun 19, 2001
- Mitsubishi Denki Kabushiki Kaisha
- Koji Tanaka
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having test mode
- Patent number 6,201,748
- Issue date Mar 13, 2001
- Mitsubishi Denki Kabushiki Kaisha
- Yayoi Nakamura
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay circuit having delay time free from influence of operation en...
- Patent number 6,121,812
- Issue date Sep 19, 2000
- Mitsubishi Denki Kabushiki Kaisha
- Yasuhiko Tsukikawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor memory device capable of executing earlier command op...
- Patent number 6,061,285
- Issue date May 9, 2000
- Mitsubishi Denki Kabushiki Kaisha
- Yasuhiko Tsukikawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Substrate potential generation circuit that can suppress variation...
- Patent number 6,005,434
- Issue date Dec 21, 1999
- Mitsubishi Denki Kabushiki Kaisha
- Yasuhiko Tsukikawa
- G05 - CONTROLLING REGULATING
Information Patent Grant
Semiconductor memory device having test mode
- Patent number 5,995,427
- Issue date Nov 30, 1999
- Mitsubishi Denki Kabushiki Kaisha
- Yasuhiko Tsukikawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device permitting large output current from ou...
- Patent number 5,982,705
- Issue date Nov 9, 1999
- Mitsubishi Denki Kabushiki Kaisha
- Yasuhiko Tsukikawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having storage capacity of 2.sup.2N+1 bits
- Patent number 5,966,316
- Issue date Oct 12, 1999
- Mitsubishi Denki Kabushiki Kaisha
- Yasuhiko Tsukikawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device clamping the overshoot and undershoot o...
- Patent number 5,905,679
- Issue date May 18, 1999
- Mitsubishi Denki Kabushiki Kaisha
- Yasuhiko Tsukikawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Synchronous semiconductor device having circuitry capable of surely...
- Patent number 5,905,690
- Issue date May 18, 1999
- Mitsubishi Denki Kabushiki Kaisha
- Mikio Sakurai
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
CONTROL DEVICE, SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD FOR...
- Publication number 20200135261
- Publication date Apr 30, 2020
- Zentel Japan Corporation
- Masaru Haraguchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20190378561
- Publication date Dec 12, 2019
- Zentel Japan Corporation
- TAKASHI KUBO
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor device and level conversion circuit
- Publication number 20070103197
- Publication date May 10, 2007
- Renesas Technology Corp.
- Kyoji Yamasaki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor memory device having dummy word line
- Publication number 20050219893
- Publication date Oct 6, 2005
- Renesas Technology Corp.
- Yasuhiko Tsukikawa
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device driven with low voltage
- Publication number 20050088881
- Publication date Apr 28, 2005
- RENESAS TECHNOLOGY CORP.
- Takeo Miki
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor device and level conversion circuit
- Publication number 20050068062
- Publication date Mar 31, 2005
- RENESAS TECHNOLOGY CORP.
- Kyoji Yamasaki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor memory device with memory cells arranged in high density
- Publication number 20040156255
- Publication date Aug 12, 2004
- RENESAS TECHNOLOGY CORP.
- Yasuhiko Tsukikawa
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device having twin-cell units
- Publication number 20040141361
- Publication date Jul 22, 2004
- RENESAS TECHNOLOGY CORP.
- Yasuhiko Tsukikawa
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device
- Publication number 20030193824
- Publication date Oct 16, 2003
- Mitsubishi Denki Kabushiki Kaisha
- Yasuhiko Tsukikawa
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device having nonvolatile memory cell of high...
- Publication number 20030161177
- Publication date Aug 28, 2003
- Mitsubishi Denki Kabushiki Kaisha
- Yasuhiko Tsukikawa
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device capable of switching output data width
- Publication number 20030103396
- Publication date Jun 5, 2003
- Mitsubishi Denki Kabushiki Kaisha
- Yukiko Maruyama
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor device with reduced terminal input capacitance
- Publication number 20030101374
- Publication date May 29, 2003
- Mitsubishi Denki Kabushiki Kaisha
- Takashi Itou
- G01 - MEASURING TESTING
Information Patent Application
Semiconductor memory device
- Publication number 20030057500
- Publication date Mar 27, 2003
- Mitsubishi Denki Kabushiki Kaisha
- Takashi Itou
- G11 - INFORMATION STORAGE
Information Patent Application
Configuration for generating a clock including a delay circuit and...
- Publication number 20020075047
- Publication date Jun 20, 2002
- Mitsubishi Denki Kabushiki Kaisha
- Yasuhiko Tsukikawa
- G11 - INFORMATION STORAGE

Yasuhiko Tsukikawa

Person

Patents Grantslast 30 patents

Semiconductor memory device

Semiconductor memory device comprising an interface conforming to J...

Semiconductor device and level conversion circuit

Semiconductor device and level conversion circuit

Semiconductor memory device driven with low voltage

Semiconductor memory device having dummy word line

Semiconductor device with reduced terminal input capacitance

Semiconductor memory device having twin-cell units

Semiconductor memory device with memory cells arranged in high density

Semiconductor memory device with shortened connection length among...

Semiconductor memory circuit having normal operation mode and burn-...

Configuration for generating a clock including a delay circuit and...

Semiconductor memory device having nonvolatile memory cell of high...

Multi-valued logical circuit with less latch-up

Semiconductor memory device capable of switching output data width

Semiconductor memory device capable of switching output data width

Semiconductor memory device capable of reducing power supply voltag...

Semiconductor memory device with write driver reset function

Semiconductor memory device provided with I/O clamp circuit

Semiconductor memory device with test mode decision circuit

Data output circuit that can drive output data speedily and semicon...

Semiconductor memory device having test mode

Delay circuit having delay time free from influence of operation en...

Semiconductor memory device capable of executing earlier command op...

Substrate potential generation circuit that can suppress variation...

Semiconductor memory device having test mode

Semiconductor memory device permitting large output current from ou...

Semiconductor memory device having storage capacity of 2.sup.2N+1 bits

Semiconductor memory device clamping the overshoot and undershoot o...

Synchronous semiconductor device having circuitry capable of surely...

Patents Applicationslast 30 patents

CONTROL DEVICE, SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD FOR...

SEMICONDUCTOR MEMORY DEVICE

Semiconductor device and level conversion circuit

Semiconductor memory device having dummy word line

Semiconductor memory device driven with low voltage

Semiconductor device and level conversion circuit

Semiconductor memory device with memory cells arranged in high density

Semiconductor memory device having twin-cell units

Semiconductor memory device

Semiconductor memory device having nonvolatile memory cell of high...

Semiconductor memory device capable of switching output data width

Semiconductor device with reduced terminal input capacitance

Semiconductor memory device

Configuration for generating a clock including a delay circuit and...