Yasuhiro Uemura

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Patents Grantslast 30 patents

Information Patent Grant
Clock generating method and clock generating circuit
- Patent number 7,580,443
- Issue date Aug 25, 2009
- Renesas Technology Corp.
- Yasuhiro Uemura
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Logic emulation module and logic emulation board
- Patent number 6,829,574
- Issue date Dec 7, 2004
- Renesas Technology Corp.
- Hiroshi Ito
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit module and information processing apparatus
- Patent number 6,266,242
- Issue date Jul 24, 2001
- Hitachi, Ltd.
- Takashi Maruyama
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit module and information processing apparatus
- Patent number 6,069,793
- Issue date May 30, 2000
- Hitachi, Ltd.
- Takashi Maruyama
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packaging method of BGA type electronic component
- Patent number 5,722,160
- Issue date Mar 3, 1998
- Hitachi, Ltd.
- Yasuhiro Uemura
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Clock generating method and clock generating circuit
- Publication number 20060176933
- Publication date Aug 10, 2006
- RENESAS TECHNOLOGY CORP.
- Yasuhiro Uemura
- H04 - ELECTRIC COMMUNICATION TECHNIQUE