Yasuhiro Yamamoto

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Patents Grantslast 30 patents

Information Patent Grant
Word line multi-selection circuit for a memory device
- Patent number 5,909,407
- Issue date Jun 1, 1999
- Fujitsu Limited
- Yasuhiro Yamamoto
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit equipped with test circuit
- Patent number 5,815,511
- Issue date Sep 29, 1998
- Fujitsu Limited
- Yasuhiro Yamamoto
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor memory device
- Patent number 5,706,236
- Issue date Jan 6, 1998
- Fujitsu Limited
- Yasuhiro Yamamoto
- G11 - INFORMATION STORAGE