Yasuo Inbe

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Yokohama-shi, JP

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Patents Grantslast 30 patents

Information Patent Grant
Semiconductor integrated circuit device and wiring arranging method...
- Patent number 6,962,868
- Issue date Nov 8, 2005
- Kabushiki Kaisha Toshiba
- Shinsuke Sakamoto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor integrated circuit device and wiring arranging method...
- Patent number 6,844,630
- Issue date Jan 18, 2005
- Kabushiki Kaisha Toshiba
- Shinsuke Sakamoto
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor integrated circuit device and wiring arranging method...
- Publication number 20040227161
- Publication date Nov 18, 2004
- KABUSHIKI KAISHA TOSHIBA
- Shinsuke Sakamoto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor integrated circuit device and wiring arranging method...
- Publication number 20020117757
- Publication date Aug 29, 2002
- Kabushiki Kaisha Toshiba
- Shinsuke Sakamoto
- H01 - BASIC ELECTRIC ELEMENTS