Yasushi Matsubara

Person

Isehara, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Memory cells and arrays of memory cells
- Patent number 11,810,607
- Issue date Nov 7, 2023
- Micron Technology, Inc.
- Yasushi Matsubara
- G11 - INFORMATION STORAGE
Information Patent Grant
Sequential voltage control for a memory device
- Patent number 11,798,634
- Issue date Oct 24, 2023
- Micron Technology, Inc.
- Ki-Jun Nam
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device capable of performing soft-post-package...
- Patent number 11,749,366
- Issue date Sep 5, 2023
- Micron Technology, Inc.
- Yasushi Matsubara
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for controlling erasing data in ferroelectric...
- Patent number 11,742,013
- Issue date Aug 29, 2023
- Micron Technology, Inc.
- Kiyotake Sakurai
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for reading and writing memory management data th...
- Patent number 11,721,372
- Issue date Aug 8, 2023
- Micron Technology, Inc.
- Yasushi Matsubara
- G11 - INFORMATION STORAGE
Information Patent Grant
Boundary protection in memory
- Patent number 11,615,828
- Issue date Mar 28, 2023
- Micron Technology, Inc.
- Ki-Jun Nam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Access schemes for access line faults in a memory device
- Patent number 11,508,458
- Issue date Nov 22, 2022
- Micron Technology, Inc.
- Yasushi Matsubara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Grouping power supplies for a sleep mode
- Patent number 11,487,346
- Issue date Nov 1, 2022
- Micron Technogy, Inc.
- Ki-Jun Nam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for reading and writing memory management data us...
- Patent number 11,462,249
- Issue date Oct 4, 2022
- Micron Technology, Inc.
- Yasushi Matsubara
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device capable of performing soft-post-package...
- Patent number 11,450,403
- Issue date Sep 20, 2022
- Micron Technology, Inc.
- Yasushi Matsubara
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for memory device power off
- Patent number 11,276,455
- Issue date Mar 15, 2022
- Micron Technology, Inc.
- Takamasa Suzuki
- G11 - INFORMATION STORAGE
Information Patent Grant
Sequential voltage control for a memory device
- Patent number 11,257,549
- Issue date Feb 22, 2022
- Micron Technology, Inc.
- Ki-Jun Nam
- G11 - INFORMATION STORAGE
Information Patent Grant
Access schemes for protecting stored data in a memory device
- Patent number 11,211,109
- Issue date Dec 28, 2021
- Micron Technology, Inc.
- Yasushi Matsubara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Boundary protection in memory
- Patent number 11,176,985
- Issue date Nov 16, 2021
- Micron Technology, Inc.
- Ki-Jun Nam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cell bottom node reset in a memory array
- Patent number 11,004,492
- Issue date May 11, 2021
- Micron Technology, Inc.
- Kiyotake Sakurai
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for controlling erasing data in ferroelectric...
- Patent number 10,984,848
- Issue date Apr 20, 2021
- Micron Technology, Inc.
- Kiyotake Sakurai
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cells and arrays of memory cells
- Patent number 10,957,374
- Issue date Mar 23, 2021
- Micron Technology, Inc.
- Yasushi Matsubara
- G11 - INFORMATION STORAGE
Information Patent Grant
Access schemes for access line faults in a memory device
- Patent number 10,902,935
- Issue date Jan 26, 2021
- Micron Technology, Inc.
- Yasushi Matsubara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Access schemes for protecting stored data in a memory device
- Patent number 10,867,653
- Issue date Dec 15, 2020
- Micron Technology, Inc.
- Yasushi Matsubara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power gate circuits for semiconductor devices
- Patent number 10,804,225
- Issue date Oct 13, 2020
- Micron Technology, Inc.
- Yasushi Matsubara
- G11 - INFORMATION STORAGE
Information Patent Grant
Cell bottom node reset in memory array
- Patent number 10,685,694
- Issue date Jun 16, 2020
- Micron Technology, Inc.
- Kiyotake Sakurai
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cells and arrays of memory cells
- Patent number 10,679,687
- Issue date Jun 9, 2020
- Micron Technology, Inc.
- Yasushi Matsubara
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for controlling erasing data in ferroelectric...
- Patent number 10,607,678
- Issue date Mar 31, 2020
- Micron Technology, Inc.
- Kiyotake Sakurai
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for reading memory cells
- Patent number 10,553,594
- Issue date Feb 4, 2020
- Micron Technology, Inc.
- Yasushi Matsubara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power gate circuits for semiconductor devices
- Patent number 10,373,921
- Issue date Aug 6, 2019
- Micron Technology, Inc.
- Yasushi Matsubara
- G11 - INFORMATION STORAGE
Information Patent Grant
Cell bottom node reset in a memory array
- Patent number 10,311,933
- Issue date Jun 4, 2019
- Micron Technology, Inc.
- Kiyotake Sakurai
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for controlling erasing data in ferroelectric...
- Patent number 10,229,727
- Issue date Mar 12, 2019
- Micron Technology, Inc.
- Kiyotake Sakurai
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for reading memory cells
- Patent number 10,083,973
- Issue date Sep 25, 2018
- Micron Technology, Inc.
- Yasushi Matsubara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cell bottom node reset in a memory array
- Patent number 10,056,129
- Issue date Aug 21, 2018
- Micron Technology, Inc.
- Kiyotake Sakurai
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
APPARATUSES AND METHODS FOR TESTING MEMORY DEVICES
- Publication number 20240331794
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- TAKAMASA SUZUKI
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE HAVING FUSE ARRAY
- Publication number 20240265992
- Publication date Aug 8, 2024
- Micron Technology, Inc.
- YASUSHI MATSUBARA
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE CAPABLE OF PERFORMING SOFT-POST-PACKAGE...
- Publication number 20230230648
- Publication date Jul 20, 2023
- Micron Technology, Inc.
- Yasushi Matsubara
- G11 - INFORMATION STORAGE
Information Patent Application
GROUPING POWER SUPPLIES FOR A POWER SAVING MODE
- Publication number 20230109187
- Publication date Apr 6, 2023
- Micron Technology, Inc.
- Ki-Jun Nam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR READING AND WRITING MEMORY MANAGEMENT DATA TH...
- Publication number 20230068011
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- Yasushi Matsubara
- G11 - INFORMATION STORAGE
Information Patent Application
SEQUENTIAL VOLTAGE CONTROL FOR A MEMORY DEVICE
- Publication number 20220246219
- Publication date Aug 4, 2022
- Micron Technology, Inc.
- Ki-Jun Nam
- G11 - INFORMATION STORAGE
Information Patent Application
BOUNDARY PROTECTION IN MEMORY
- Publication number 20220076725
- Publication date Mar 10, 2022
- Micron Technology, Inc.
- Ki-Jun Nam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR READING AND WRITING MEMORY MANAGEMENT DATA TH...
- Publication number 20210407556
- Publication date Dec 30, 2021
- Micron Technology, Inc.
- Yasushi Matsubara
- G11 - INFORMATION STORAGE
Information Patent Application
GROUPING POWER SUPPLIES FOR A SLEEP MODE
- Publication number 20210373648
- Publication date Dec 2, 2021
- Micron Technology, Inc.
- Ki-Jun Nam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEQUENTIAL VOLTAGE CONTROL FOR A MEMORY DEVICE
- Publication number 20210350861
- Publication date Nov 11, 2021
- Micron Technology, Inc.
- Ki-Jun Nam
- G11 - INFORMATION STORAGE
Information Patent Application
ACCESS SCHEMES FOR PROTECTING STORED DATA IN A MEMORY DEVICE
- Publication number 20210210129
- Publication date Jul 8, 2021
- Micron Technology, Inc.
- Yasushi Matsubara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR CONTROLLING ERASING DATA IN FERROELECTRIC...
- Publication number 20210210131
- Publication date Jul 8, 2021
- Micron Technology, Inc.
- Kiyotake Sakurai
- G11 - INFORMATION STORAGE
Information Patent Application
ACCESS SCHEMES FOR ACCESS LINE FAULTS IN A MEMORY DEVICE
- Publication number 20210210158
- Publication date Jul 8, 2021
- Micron Technology, Inc.
- Yasushi Matsubara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Cells and Arrays of Memory Cells
- Publication number 20210183426
- Publication date Jun 17, 2021
- Micron Technology, Inc.
- Yasushi Matsubara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CELL BOTTOM NODE RESET IN MEMORY ARRAY
- Publication number 20200335147
- Publication date Oct 22, 2020
- Micron Technology, Inc.
- Kiyotake Sakurai
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Cells and Arrays of Memory Cells
- Publication number 20200286539
- Publication date Sep 10, 2020
- Micron Technology, Inc.
- Yasushi Matsubara
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD FOR CONTROLLING ERASING DATA IN FERROELECTRIC...
- Publication number 20200185020
- Publication date Jun 11, 2020
- Micron Technology, Inc.
- Kiyotake Sakurai
- G11 - INFORMATION STORAGE
Information Patent Application
ACCESS SCHEMES FOR ACCESS LINE FAULTS IN A MEMORY DEVICE
- Publication number 20200051659
- Publication date Feb 13, 2020
- Micron Technology, Inc.
- Yasushi Matsubara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER GATE CIRCUITS FOR SEMICONDUCTOR DEVICES
- Publication number 20190355677
- Publication date Nov 21, 2019
- Micron Technology, Inc.
- Yasushi Matsubara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ACCESS SCHEMES FOR PROTECTING STORED DATA IN A MEMORY DEVICE
- Publication number 20190325934
- Publication date Oct 24, 2019
- Micron Technology, Inc.
- Yasushi Matsubara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CELL BOTTOM NODE RESET IN MEMORY ARRAY
- Publication number 20190311757
- Publication date Oct 10, 2019
- Micron Technology, Inc.
- Kiyotake Sakurai
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD FOR CONTROLLING ERASING DATA IN FERROELECTRIC...
- Publication number 20190287602
- Publication date Sep 19, 2019
- Micron Technology, Inc.
- Kiyotake Sakurai
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Cells and Arrays of Memory Cells
- Publication number 20190066751
- Publication date Feb 28, 2019
- Micron Technology, Inc.
- Yasushi Matsubara
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR READING MEMORY CELLS
- Publication number 20190051657
- Publication date Feb 14, 2019
- Micron Technology, Inc.
- Yasushi Matsubara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CELL BOTTOM NODE RESET IN A MEMORY ARRAY
- Publication number 20190051343
- Publication date Feb 14, 2019
- Micron Technology, Inc.
- Kiyotake Sakurai
- G11 - INFORMATION STORAGE
Information Patent Application
POWER GATE CIRCUITS FOR SEMICONDUCTOR DEVICES
- Publication number 20180366422
- Publication date Dec 20, 2018
- Micron Technology, Inc.
- YASUSHI MATSUBARA
- H01 - BASIC ELECTRIC ELEMENTS

Yasushi Matsubara

Person

Patents Grantslast 30 patents

Memory cells and arrays of memory cells

Sequential voltage control for a memory device

Semiconductor memory device capable of performing soft-post-package...

Apparatus and method for controlling erasing data in ferroelectric...

System and method for reading and writing memory management data th...

Boundary protection in memory

Access schemes for access line faults in a memory device

Grouping power supplies for a sleep mode

System and method for reading and writing memory management data us...

Semiconductor memory device capable of performing soft-post-package...

Systems and methods for memory device power off

Sequential voltage control for a memory device

Access schemes for protecting stored data in a memory device

Boundary protection in memory

Cell bottom node reset in a memory array

Apparatus and method for controlling erasing data in ferroelectric...

Memory cells and arrays of memory cells

Access schemes for access line faults in a memory device

Access schemes for protecting stored data in a memory device

Power gate circuits for semiconductor devices

Cell bottom node reset in memory array

Memory cells and arrays of memory cells

Apparatus and method for controlling erasing data in ferroelectric...

Apparatuses and methods for reading memory cells

Power gate circuits for semiconductor devices

Cell bottom node reset in a memory array

Apparatus and method for controlling erasing data in ferroelectric...

Apparatuses and methods for reading memory cells

Cell bottom node reset in a memory array

Patents Applicationslast 30 patents

APPARATUSES AND METHODS FOR TESTING MEMORY DEVICES

SEMICONDUCTOR DEVICE HAVING FUSE ARRAY

SEMICONDUCTOR MEMORY DEVICE CAPABLE OF PERFORMING SOFT-POST-PACKAGE...

GROUPING POWER SUPPLIES FOR A POWER SAVING MODE

SYSTEM AND METHOD FOR READING AND WRITING MEMORY MANAGEMENT DATA TH...

SEQUENTIAL VOLTAGE CONTROL FOR A MEMORY DEVICE

BOUNDARY PROTECTION IN MEMORY

SYSTEM AND METHOD FOR READING AND WRITING MEMORY MANAGEMENT DATA TH...

GROUPING POWER SUPPLIES FOR A SLEEP MODE

SEQUENTIAL VOLTAGE CONTROL FOR A MEMORY DEVICE

ACCESS SCHEMES FOR PROTECTING STORED DATA IN A MEMORY DEVICE

APPARATUS AND METHOD FOR CONTROLLING ERASING DATA IN FERROELECTRIC...

ACCESS SCHEMES FOR ACCESS LINE FAULTS IN A MEMORY DEVICE

Memory Cells and Arrays of Memory Cells

CELL BOTTOM NODE RESET IN MEMORY ARRAY

Memory Cells and Arrays of Memory Cells

APPARATUS AND METHOD FOR CONTROLLING ERASING DATA IN FERROELECTRIC...

ACCESS SCHEMES FOR ACCESS LINE FAULTS IN A MEMORY DEVICE

POWER GATE CIRCUITS FOR SEMICONDUCTOR DEVICES

ACCESS SCHEMES FOR PROTECTING STORED DATA IN A MEMORY DEVICE

CELL BOTTOM NODE RESET IN MEMORY ARRAY

APPARATUS AND METHOD FOR CONTROLLING ERASING DATA IN FERROELECTRIC...

Memory Cells and Arrays of Memory Cells

APPARATUSES AND METHODS FOR READING MEMORY CELLS

CELL BOTTOM NODE RESET IN A MEMORY ARRAY

POWER GATE CIRCUITS FOR SEMICONDUCTOR DEVICES