Yasushige Ogawa

Person

Kasugai-shi, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Body-bias voltage controller and method of controlling body-bias vo...
- Patent number 8,659,346
- Issue date Feb 25, 2014
- Spansion LLC
- Yasushige Ogawa
- G05 - CONTROLLING REGULATING
Information Patent Grant
Level shift circuit and semiconductor device
- Patent number 8,542,051
- Issue date Sep 24, 2013
- Fujitsu Semiconductor Limited
- Yasushige Ogawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Leak current detection circuit, body bias control circuit, semicond...
- Patent number 8,174,282
- Issue date May 8, 2012
- Fujitsu Semiconductor Limited
- Kiyonaga Fujii
- G01 - MEASURING TESTING
Information Patent Grant
Level shift circuit
- Patent number 7,759,976
- Issue date Jul 20, 2010
- Fujitsu Semiconductor Limited
- Yasushige Ogawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Synchronous semiconductor device, and inspection system and method...
- Patent number 7,663,392
- Issue date Feb 16, 2010
- Fujitsu Microelectronics Limited
- Hiroyuki Sugamoto
- G11 - INFORMATION STORAGE
Information Patent Grant
Control apparatus, semiconductor integrated circuit apparatus, and...
- Patent number 7,557,587
- Issue date Jul 7, 2009
- Fujitsu Microelectronics Limited
- Yasushige Ogawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Oscillator circuit, semiconductor device and semiconductor memory d...
- Patent number 7,492,232
- Issue date Feb 17, 2009
- Fujitsu Microelectronics Limited
- Yasushige Ogawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit device, and adjustment method of s...
- Patent number 7,459,960
- Issue date Dec 2, 2008
- Fujitsu Limited
- Yasushige Ogawa
- G01 - MEASURING TESTING
Information Patent Grant
Synchronous semiconductor device, and inspection system and method...
- Patent number 7,378,863
- Issue date May 27, 2008
- Fujitsu Limited
- Hiroyuki Sugamoto
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and program for designing semiconductor device
- Patent number 7,353,469
- Issue date Apr 1, 2008
- Fujitsu Limited
- Yasushige Ogawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Oscillator circuit, semiconductor device and semiconductor memory d...
- Patent number 7,239,210
- Issue date Jul 3, 2007
- Fujitsu Limited
- Yasushige Ogawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Layout method of decoupling capacitors
- Patent number 7,222,320
- Issue date May 22, 2007
- Fujitsu Limited
- Yasushige Ogawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Control circuit for DC-DC converter in semiconductor integrated cir...
- Patent number 7,221,131
- Issue date May 22, 2007
- Fujitsu Limited
- Hidekiyo Ozawa
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Semiconductor device having logic circuit and macro circuit
- Patent number 7,167,042
- Issue date Jan 23, 2007
- Fujitsu Limited
- Yasushige Ogawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device having logic circuit and macro circuit
- Patent number 7,078,945
- Issue date Jul 18, 2006
- Fujitsu Limited
- Yasushige Ogawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Oscillator circuit, semiconductor device and semiconductor memory d...
- Patent number 7,042,300
- Issue date May 9, 2006
- Fujitsu Limited
- Yasushige Ogawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit device, and adjustment method of s...
- Patent number 6,943,616
- Issue date Sep 13, 2005
- Fujitsu Limited
- Yasushige Ogawa
- G01 - MEASURING TESTING
Information Patent Grant
Synchronous semiconductor device, and inspection system and method...
- Patent number 6,891,393
- Issue date May 10, 2005
- Fujitsu Limited
- Hiroyuki Sugamoto
- G11 - INFORMATION STORAGE
Information Patent Grant
Oscillator circuit, semiconductor device and semiconductor memory d...
- Patent number 6,809,605
- Issue date Oct 26, 2004
- Fujitsu Limited
- Yasushige Ogawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit device and data writing method the...
- Patent number 6,741,518
- Issue date May 25, 2004
- Fujitsu Limited
- Kazumi Kojima
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device including logic circuit and macro circuit whic...
- Patent number 6,700,437
- Issue date Mar 2, 2004
- Fujitsu Limited
- Yasushige Ogawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit having enhanced acquisition of ext...
- Patent number 6,545,940
- Issue date Apr 8, 2003
- Fujitsu Limited
- Hiroyuki Sugamoto
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with redundancy circuit
- Patent number 6,542,421
- Issue date Apr 1, 2003
- Fujitsu Limited
- Hiroyuki Sugamoto
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit device and data-write method thereof
- Patent number 6,525,975
- Issue date Feb 25, 2003
- Fujitsu Limited
- Kazumi Kojima
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with redundancy circuit
- Patent number 6,314,033
- Issue date Nov 6, 2001
- Fujitsu Limited
- Hiroyuki Sugamoto
- G11 - INFORMATION STORAGE
Information Patent Grant
Trimming circuit for system integrated circuit
- Patent number 6,307,801
- Issue date Oct 23, 2001
- Fujitsu Limited
- Yasushige Ogawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having bit line precharge circuits acti...
- Patent number 6,275,431
- Issue date Aug 14, 2001
- Fujitsu Limited
- Kazumi Kojima
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having redundancy unit for data line co...
- Patent number 6,269,033
- Issue date Jul 31, 2001
- Fujitsu Limited
- Yoshiyuki Ishida
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash-erasable semiconductor memory device having an improved relia...
- Patent number 6,014,329
- Issue date Jan 11, 2000
- Fujitsu Limited
- Takao Akaogi
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash-erasable semiconductor memory device having improved reliability
- Patent number 5,910,916
- Issue date Jun 8, 1999
- Fujitsu Limited
- Takao Akaogi
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
LEVEL SHIFT CIRCUIT AND SEMICONDUCTOR DEVICE
- Publication number 20120133416
- Publication date May 31, 2012
- FUJITSU SEMICONDUCTOR LIMITED
- Yasushige OGAWA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
BODY-BIAS VOLTAGE CONTROLLER AND METHOD OF CONTROLLING BODY-BIAS VO...
- Publication number 20110012672
- Publication date Jan 20, 2011
- FUJITSU SEMICONDUCTOR LIMITED
- Yasushige OGAWA
- G05 - CONTROLLING REGULATING
Information Patent Application
SYNCHRONOUS SEMICONDUCTOR DEVICE, AND INSPECTION SYSTEM AND METHOD...
- Publication number 20100052727
- Publication date Mar 4, 2010
- FUJITSU LIMITED
- Hiroyuki Sugamoto
- G01 - MEASURING TESTING
Information Patent Application
LEAK CURRENT DETECTION CIRCUIT, BODY BIAS CONTROL CIRCUIT, SEMICOND...
- Publication number 20100026335
- Publication date Feb 4, 2010
- Fujitsu Microelectronics Limited
- Kiyonaga Fujii
- G01 - MEASURING TESTING
Information Patent Application
SYNCHRONOUS SEMICONDUCTOR DEVICE, AND INSPECTION SYSTEM AND METHOD...
- Publication number 20080204067
- Publication date Aug 28, 2008
- FUJITSU LIMITED
- Hiroyuki Sugamoto
- G01 - MEASURING TESTING
Information Patent Application
LEVEL SHIFT CIRCUIT
- Publication number 20080048719
- Publication date Feb 28, 2008
- FUJITSU LIMITED
- Yasushige OGAWA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Oscillator circuit, semiconductor device and semiconductor memory d...
- Publication number 20070222531
- Publication date Sep 27, 2007
- FUJITSU LIMITED
- Yasushige Ogawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Control apparatus, semiconductor integrated circuit apparatus, and...
- Publication number 20070170929
- Publication date Jul 26, 2007
- FUJITSU LIMITED
- Yasushige Ogawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-power supply circuit and multi-power supply method
- Publication number 20070001652
- Publication date Jan 4, 2007
- FUJITSU LIMITED
- Yasushige Ogawa
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Semiconductor integrated circuit device, and adjustment method of s...
- Publication number 20060214724
- Publication date Sep 28, 2006
- FUJITSU LIMITED
- Yasushige Ogawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Oscillator circuit, semiconductor device and semiconductor memory d...
- Publication number 20060152291
- Publication date Jul 13, 2006
- FUJITSU LIMITED
- Yasushige Ogawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Control circuit for DC-DC converter in semiconductor integrated cir...
- Publication number 20060139820
- Publication date Jun 29, 2006
- FUJITSU LIMITED
- Hidekiyo Ozawa
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
Method and program for designing semiconductor device
- Publication number 20060123366
- Publication date Jun 8, 2006
- FUJITSU LIMITED
- Yasushige Ogawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Layout method of decoupling capacitors
- Publication number 20060017135
- Publication date Jan 26, 2006
- FUJITSU LIMITED
- Yasushige Ogawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor integrated circuit device, and adjustment method of s...
- Publication number 20050270871
- Publication date Dec 8, 2005
- FUJITSU LIMITED
- Yasushige Ogawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor device having logic circuit and macro circuit
- Publication number 20050127985
- Publication date Jun 16, 2005
- FUJITSU LIMITED
- Yasushige Ogawa
- G11 - INFORMATION STORAGE
Information Patent Application
Synchronous semiconductor device, and inspection system and method...
- Publication number 20050111293
- Publication date May 26, 2005
- FUJITSU LIMITED
- Hiroyuki Sugamoto
- G01 - MEASURING TESTING
Information Patent Application
Oscillator circuit, semiconductor device and semiconductor memory d...
- Publication number 20050030113
- Publication date Feb 10, 2005
- FUJITSU LIMITED
- Yasushige Ogawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor device having logic circuit and macro circuit
- Publication number 20040145408
- Publication date Jul 29, 2004
- FUJITSU LIMITED
- Yasushige Ogawa
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor integrated circuit device, and adjustment method of s...
- Publication number 20040041595
- Publication date Mar 4, 2004
- FUJITSU, LTD.
- Yasushige Ogawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Synchronous semiconductor device, and inspection system and method...
- Publication number 20030140290
- Publication date Jul 24, 2003
- FUJITSU LIMITED
- Hiroyuki Sugamoto
- G01 - MEASURING TESTING
Information Patent Application
Oscillator circuit, semiconductor device and semiconductor memory d...
- Publication number 20030128076
- Publication date Jul 10, 2003
- FUJITSU LIMITED
- Yasushige Ogawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor integrated circuit device and data writing method the...
- Publication number 20020191476
- Publication date Dec 19, 2002
- FUJITSU LIMITED
- Kazumi Kojima
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor integrated circuit device and data-write method thereof
- Publication number 20020145927
- Publication date Oct 10, 2002
- FUJITSU LIMITED
- Kazumi Kojima
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor integrated circuit having enhanced acquisition of ext...
- Publication number 20020036946
- Publication date Mar 28, 2002
- FUJITSU LIMITED
- Hiroyuki Sugamoto
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device with redundancy circuit
- Publication number 20020031023
- Publication date Mar 14, 2002
- FUJITSU LIMITED
- Hiroyuki Sugamoto
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device with redundancy circuit
- Publication number 20010050868
- Publication date Dec 13, 2001
- FUJITSU LIMITED
- Hiroyuki Sugamoto
- G11 - INFORMATION STORAGE

Yasushige Ogawa

Person

Patents Grantslast 30 patents

Body-bias voltage controller and method of controlling body-bias vo...

Level shift circuit and semiconductor device

Leak current detection circuit, body bias control circuit, semicond...

Level shift circuit

Synchronous semiconductor device, and inspection system and method...

Control apparatus, semiconductor integrated circuit apparatus, and...

Oscillator circuit, semiconductor device and semiconductor memory d...

Semiconductor integrated circuit device, and adjustment method of s...

Synchronous semiconductor device, and inspection system and method...

Method and program for designing semiconductor device

Oscillator circuit, semiconductor device and semiconductor memory d...

Layout method of decoupling capacitors

Control circuit for DC-DC converter in semiconductor integrated cir...

Semiconductor device having logic circuit and macro circuit

Semiconductor device having logic circuit and macro circuit

Oscillator circuit, semiconductor device and semiconductor memory d...

Semiconductor integrated circuit device, and adjustment method of s...

Synchronous semiconductor device, and inspection system and method...

Oscillator circuit, semiconductor device and semiconductor memory d...

Semiconductor integrated circuit device and data writing method the...

Semiconductor device including logic circuit and macro circuit whic...

Semiconductor integrated circuit having enhanced acquisition of ext...

Semiconductor memory device with redundancy circuit

Semiconductor integrated circuit device and data-write method thereof

Semiconductor memory device with redundancy circuit

Trimming circuit for system integrated circuit

Semiconductor memory device having bit line precharge circuits acti...

Semiconductor memory device having redundancy unit for data line co...

Flash-erasable semiconductor memory device having an improved relia...

Flash-erasable semiconductor memory device having improved reliability

Patents Applicationslast 30 patents

LEVEL SHIFT CIRCUIT AND SEMICONDUCTOR DEVICE

BODY-BIAS VOLTAGE CONTROLLER AND METHOD OF CONTROLLING BODY-BIAS VO...

SYNCHRONOUS SEMICONDUCTOR DEVICE, AND INSPECTION SYSTEM AND METHOD...

LEAK CURRENT DETECTION CIRCUIT, BODY BIAS CONTROL CIRCUIT, SEMICOND...

SYNCHRONOUS SEMICONDUCTOR DEVICE, AND INSPECTION SYSTEM AND METHOD...

LEVEL SHIFT CIRCUIT

Oscillator circuit, semiconductor device and semiconductor memory d...

Control apparatus, semiconductor integrated circuit apparatus, and...

Multi-power supply circuit and multi-power supply method

Semiconductor integrated circuit device, and adjustment method of s...

Oscillator circuit, semiconductor device and semiconductor memory d...

Control circuit for DC-DC converter in semiconductor integrated cir...

Method and program for designing semiconductor device

Layout method of decoupling capacitors

Semiconductor integrated circuit device, and adjustment method of s...

Semiconductor device having logic circuit and macro circuit

Synchronous semiconductor device, and inspection system and method...

Oscillator circuit, semiconductor device and semiconductor memory d...

Semiconductor device having logic circuit and macro circuit

Semiconductor integrated circuit device, and adjustment method of s...

Synchronous semiconductor device, and inspection system and method...

Oscillator circuit, semiconductor device and semiconductor memory d...

Semiconductor integrated circuit device and data writing method the...

Semiconductor integrated circuit device and data-write method thereof

Semiconductor integrated circuit having enhanced acquisition of ext...

Semiconductor memory device with redundancy circuit

Semiconductor memory device with redundancy circuit