Yayoi Nakamura

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Hyogo, JP

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Patents Grantslast 30 patents

Information Patent Grant
Semiconductor memory device with controllable operation timing of s...
- Patent number 6,480,435
- Issue date Nov 12, 2002
- Mitsubishi Denki Kabushiki Kaisha
- Yayoi Nakamura
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having test mode
- Patent number 6,201,748
- Issue date Mar 13, 2001
- Mitsubishi Denki Kabushiki Kaisha
- Yayoi Nakamura
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor memory device with controllable operation timing of s...
- Publication number 20020101774
- Publication date Aug 1, 2002
- Mitsubishi Denki Kabushiki Kaisha
- Yayoi Nakamura
- G11 - INFORMATION STORAGE