Yehuda AZENKOT

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Fast equalization for jitter mitigation
- Patent number 11,962,439
- Issue date Apr 16, 2024
- MACOM Technology Solutions Holdings, Inc.
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Constellation selection threshold adaptation for slicer
- Patent number 11,070,297
- Issue date Jul 20, 2021
- MACOM Technology Solutions Holdings, Inc.
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Receiver supporting multiple data rates with fast equalization
- Patent number 10,938,604
- Issue date Mar 2, 2021
- MACOM Technology Solutions Holdings, Inc.
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
CTLE adaptation based on post-cursors
- Patent number 10,608,848
- Issue date Mar 31, 2020
- MACOM Technology Solutions Holdings, Inc.
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Dynamic constellation adaptation for slicer
- Patent number 10,498,579
- Issue date Dec 3, 2019
- MACOM TECHNOLOGY SOLUTIONS HOLDING, INC.
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Sampling phase optimization for digital modulated signals
- Patent number 10,498,565
- Issue date Dec 3, 2019
- MACOM Technology Solutions Holding, Inc.
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Receiver supporting multiple data rates
- Patent number 10,411,918
- Issue date Sep 10, 2019
- MACOM Technology Solutions Holdings, Inc.
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Mitigating interaction between adaptive equalization and timing rec...
- Patent number 10,404,496
- Issue date Sep 3, 2019
- MACOM Technology Solutions Holding, Inc.
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High frequency digital-to-analog conversion by interleaving without...
- Patent number 10,305,504
- Issue date May 28, 2019
- MACOM Technology Solutions Holding, Inc.
- Yehuda Azenkot
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Mitigating interaction between adaptive equalization and timing rec...
- Patent number 10,135,606
- Issue date Nov 20, 2018
- MACOM CONNECTIVITY SOLUTIONS, LLC
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Mitigating interaction between adaptive equalization and timing rec...
- Patent number 10,050,774
- Issue date Aug 14, 2018
- MACOM Technology Solutions Holding, Inc.
- Yehuda Azenkot
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High frequency Digital-to-Analog conversion by interleaving without...
- Patent number 9,973,203
- Issue date May 15, 2018
- MACOM Connectivity Solutions, LLC
- Yehuda Azenkot
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High frequency digital-to-analog conversion by time-interleaving wi...
- Patent number 9,954,547
- Issue date Apr 24, 2018
- MACOM Connectivity Solutions, LLC
- Yehuda Azenkot
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High speed add-compare-select for Viterbi decoder
- Patent number 9,948,427
- Issue date Apr 17, 2018
- MACOM CONNECTIVITY SOLUTIONS, LLC
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Resolving interaction between channel estimation and timing recovery
- Patent number 9,882,710
- Issue date Jan 30, 2018
- MACOM CONNECTIVITY SOLUTIONS, LLC
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Timing recovery with adaptive channel response estimation
- Patent number 9,882,709
- Issue date Jan 30, 2018
- MACOM CONNECTIVITY SOLUTIONS, LLC
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
DC offset calibration of ADC with alternate comparators
- Patent number 9,496,884
- Issue date Nov 15, 2016
- Applied Micro Circuits Corporation
- Yehuda Azenkot
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock phase adaptation for precursor ISI reduction
- Patent number 9,397,867
- Issue date Jul 19, 2016
- Applied Micro Circuits Corporation
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for gapping
- Patent number 9,369,135
- Issue date Jun 14, 2016
- Applied Micro Circuits Corporation
- Yehuda Azenkot
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Frequency synthesis with gapper and multi-modulus divider
- Patent number 9,281,825
- Issue date Mar 8, 2016
- Applied Micro Circuits Corporation
- Yehuda Azenkot
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus for and method of robust packet detection and frequency o...
- Patent number 9,184,971
- Issue date Nov 10, 2015
- Texas Instruments Incorporated
- Gregory Lerner
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Device and method for reducing modulation profile memory size
- Patent number 9,154,345
- Issue date Oct 6, 2015
- Marvell International Ltd.
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for throughput enhancement
- Patent number 9,071,521
- Issue date Jun 30, 2015
- Marvell International Ltd.
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for smoothing jitter generated by byte stuffing
- Patent number 9,065,610
- Issue date Jun 23, 2015
- Applied Micro Circuits Corporation
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Jitter mitigating phase locked loop circuit
- Patent number 9,008,255
- Issue date Apr 14, 2015
- Applied Micro Circuits Corporation
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Frequency synthesis with gapper
- Patent number 8,816,730
- Issue date Aug 26, 2014
- Applied Micro Circuits Corporation
- Yehuda Azenkot
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Device and method for reducing modulation profile memory size
- Patent number 8,731,080
- Issue date May 20, 2014
- Marvell International Ltd.
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Fractional phase-locked loop with dynamic divide ratio adjustment
- Patent number 8,674,731
- Issue date Mar 18, 2014
- Applied Micro Circuits Corporations
- Michael Hellmer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for mitigating the residual CFO effect on chan...
- Patent number 8,660,216
- Issue date Feb 25, 2014
- Marvell International Ltd.
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus of frequency domain echo canceller
- Patent number 8,619,897
- Issue date Dec 31, 2013
- NetLogic Microsystems, Inc.
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
PAST EQUALIZATION FOR JITTER MITIGATION
- Publication number 20220158876
- Publication date May 19, 2022
- MACOM Technology Solutions Holdings, Inc.
- Yehuda AZENKOT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RECEIVER SUPPORTING MULTIPLE DATA RATES WITH FAST EQUALIZATION
- Publication number 20200304352
- Publication date Sep 24, 2020
- MACOM Technology Solutions Holdings, Inc.
- Yehuda AZENKOT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CTLE ADAPTATION BASED ON POST-CURSORS
- Publication number 20200112462
- Publication date Apr 9, 2020
- MACOM Technology Solutions Holding, Inc.
- Yehuda AZENKOT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DYNAMIC CONSTELLATION ADAPTATION FOR SLICER
- Publication number 20190356528
- Publication date Nov 21, 2019
- MACOM Technology Solutions Holding, Inc.
- Yehuda AZENKOT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CONSTELLATION SELECTION THRESHOLD ADAPTATION FOR SLICER
- Publication number 20190356393
- Publication date Nov 21, 2019
- MACOM Technology Solutions Holding, Inc.
- Yehuda AZENKOT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PHASE INTERPOLATION CALIBRATION FOR TIMING RECOVERY
- Publication number 20180324013
- Publication date Nov 8, 2018
- MACOM Technology Solutions Holding, Inc.
- Yehuda AZENKOT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MITIGATING INTERACTION BETWEEN ADAPTIVE EQUALIZATION AND TIMING REC...
- Publication number 20180123776
- Publication date May 3, 2018
- Applied Micro Circuits Corporation
- Yehuda AZENKOT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RESOLVING INTERACTION BETWEEN CHANNEL ESTIMATION AND TIMING RECOVERY
- Publication number 20170373827
- Publication date Dec 28, 2017
- Applied Micro Circuits Corporation
- Yehuda AZENKOT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TIMING RECOVERY WITH ADAPTIVE CHANNEL RESPONSE ESTIMATION
- Publication number 20170331619
- Publication date Nov 16, 2017
- Applied Micro Circuits Corporation
- Yehuda AZENKOT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HIGH SPEED ADD-COMPARE-SELECT FOR VITERBI DECODER
- Publication number 20170163380
- Publication date Jun 8, 2017
- Applied Micro Circuits Corporation
- Yehuda AZENKOT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CLOCK PHASE ADAPTATION FOR PRECURSOR ISI REDUCTION
- Publication number 20160234043
- Publication date Aug 11, 2016
- Applied Micro Circuits Corporation
- Yehuda AZENKOT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
JITTER MITIGATING PHASE LOCKED LOOP CIRCUIT
- Publication number 20150110233
- Publication date Apr 23, 2015
- Applied Micro Circuits Corporation
- Yehuda AZENKOT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FREQUENCY SYNTHESIS WITH GAPPER AND MULTI-MODULUS DIVIDER
- Publication number 20140375364
- Publication date Dec 25, 2014
- Yehuda AZENKOT
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS FOR SMOOTHING JITTER GENERATED BY BYTE STUFFING
- Publication number 20140314192
- Publication date Oct 23, 2014
- Applied Micro Circuits Corporation
- Yehuda AZENKOT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR GAPPING
- Publication number 20140266339
- Publication date Sep 18, 2014
- Applied Micro Circuits Corporation
- Yehuda AZENKOT
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FREQUENCY SYNTHESIS WITH GAPPER
- Publication number 20140266328
- Publication date Sep 18, 2014
- Applied Micro Circuits Corporation
- Yehuda AZENKOT
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEM AND METHOD FOR THROUGHPUT ENHANCEMENT
- Publication number 20140086087
- Publication date Mar 27, 2014
- Marvell International Ltd.
- Yehuda AZENKOT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM AND METHOD FOR THROUGHPUT ENHANCEMENT
- Publication number 20120051238
- Publication date Mar 1, 2012
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Dynamic Optimization of Overlap-and-Add Length
- Publication number 20110310999
- Publication date Dec 22, 2011
- TEXAS INSTRUMENTS INCORPORATED
- William L. Abbott
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR MITIGATING THE RESIDUAL CFO EFFECT ON CHAN...
- Publication number 20110293032
- Publication date Dec 1, 2011
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR PACKET DETECTION VIA CROSS-CORRELATION IN...
- Publication number 20110249778
- Publication date Oct 13, 2011
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS OF FREQUENCY DOMAIN ECHO CANCELLER
- Publication number 20100142604
- Publication date Jun 10, 2010
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEMS AND METHODS FOR TRACKING COMMUNICATION PARAMETERS OVER A PL...
- Publication number 20100102889
- Publication date Apr 29, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Yehuda AZENKOT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DIGITAL COMMUNICATION USING AN INEXPENSIVE REFERENCE CRYSTAL
- Publication number 20090141781
- Publication date Jun 4, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Yehuda AZENKOT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DATA THROUGHPUT IN AN INTERFERENCE-RICH WIRELESS ENVIRONMENT
- Publication number 20090122926
- Publication date May 14, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Yehuda AZENKOT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Downstream transmitter and cable modem receiver for 1024 QAM
- Publication number 20090044083
- Publication date Feb 12, 2009
- Terayon Communications Systems, Inc.
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Dynamic optimization of overlap-and-add length
- Publication number 20080310565
- Publication date Dec 18, 2008
- TEXAS INSTRUMENTS INCORPORATED
- William L. Abbott
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System for low noise aggregation in DOCSIS contention slots in a sh...
- Publication number 20080170853
- Publication date Jul 17, 2008
- Shlomo Selim Rakib
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System and method for automatic channel selection
- Publication number 20080159210
- Publication date Jul 3, 2008
- Texas Instruments, Inc.
- Artur Zaks
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System and method of flexible channel allocation in an ultra wideba...
- Publication number 20080043813
- Publication date Feb 21, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Yehuda Azenkot
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Yehuda AZENKOT

Person

Patents Grantslast 30 patents

Fast equalization for jitter mitigation

Constellation selection threshold adaptation for slicer

Receiver supporting multiple data rates with fast equalization

CTLE adaptation based on post-cursors

Dynamic constellation adaptation for slicer

Sampling phase optimization for digital modulated signals

Receiver supporting multiple data rates

Mitigating interaction between adaptive equalization and timing rec...

High frequency digital-to-analog conversion by interleaving without...

Mitigating interaction between adaptive equalization and timing rec...

Mitigating interaction between adaptive equalization and timing rec...

High frequency Digital-to-Analog conversion by interleaving without...

High frequency digital-to-analog conversion by time-interleaving wi...

High speed add-compare-select for Viterbi decoder

Resolving interaction between channel estimation and timing recovery

Timing recovery with adaptive channel response estimation

DC offset calibration of ADC with alternate comparators

Clock phase adaptation for precursor ISI reduction

Method and apparatus for gapping

Frequency synthesis with gapper and multi-modulus divider

Apparatus for and method of robust packet detection and frequency o...

Device and method for reducing modulation profile memory size

System and method for throughput enhancement

Method and apparatus for smoothing jitter generated by byte stuffing

Jitter mitigating phase locked loop circuit

Frequency synthesis with gapper

Device and method for reducing modulation profile memory size

Fractional phase-locked loop with dynamic divide ratio adjustment

Method and apparatus for mitigating the residual CFO effect on chan...

Method and apparatus of frequency domain echo canceller

Patents Applicationslast 30 patents

PAST EQUALIZATION FOR JITTER MITIGATION

RECEIVER SUPPORTING MULTIPLE DATA RATES WITH FAST EQUALIZATION

CTLE ADAPTATION BASED ON POST-CURSORS

DYNAMIC CONSTELLATION ADAPTATION FOR SLICER

CONSTELLATION SELECTION THRESHOLD ADAPTATION FOR SLICER

PHASE INTERPOLATION CALIBRATION FOR TIMING RECOVERY

MITIGATING INTERACTION BETWEEN ADAPTIVE EQUALIZATION AND TIMING REC...

RESOLVING INTERACTION BETWEEN CHANNEL ESTIMATION AND TIMING RECOVERY

TIMING RECOVERY WITH ADAPTIVE CHANNEL RESPONSE ESTIMATION

HIGH SPEED ADD-COMPARE-SELECT FOR VITERBI DECODER

CLOCK PHASE ADAPTATION FOR PRECURSOR ISI REDUCTION

JITTER MITIGATING PHASE LOCKED LOOP CIRCUIT

FREQUENCY SYNTHESIS WITH GAPPER AND MULTI-MODULUS DIVIDER

METHOD AND APPARATUS FOR SMOOTHING JITTER GENERATED BY BYTE STUFFING

METHOD AND APPARATUS FOR GAPPING

FREQUENCY SYNTHESIS WITH GAPPER

SYSTEM AND METHOD FOR THROUGHPUT ENHANCEMENT

SYSTEM AND METHOD FOR THROUGHPUT ENHANCEMENT

Dynamic Optimization of Overlap-and-Add Length

METHOD AND APPARATUS FOR MITIGATING THE RESIDUAL CFO EFFECT ON CHAN...

METHOD AND APPARATUS FOR PACKET DETECTION VIA CROSS-CORRELATION IN...

METHOD AND APPARATUS OF FREQUENCY DOMAIN ECHO CANCELLER

SYSTEMS AND METHODS FOR TRACKING COMMUNICATION PARAMETERS OVER A PL...

DIGITAL COMMUNICATION USING AN INEXPENSIVE REFERENCE CRYSTAL

DATA THROUGHPUT IN AN INTERFERENCE-RICH WIRELESS ENVIRONMENT

Downstream transmitter and cable modem receiver for 1024 QAM

Dynamic optimization of overlap-and-add length

System for low noise aggregation in DOCSIS contention slots in a sh...

System and method for automatic channel selection

System and method of flexible channel allocation in an ultra wideba...