Yeshayahu Mor

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Flexible reset scheme supporting normal system operation, test and...
- Patent number 5,894,176
- Issue date Apr 13, 1999
- Integrated Device Technology, Inc.
- Philip A. Bourekas
- G01 - MEASURING TESTING
Information Patent Grant
Structure and method for multiple-level read buffer supporting opti...
- Patent number 5,649,232
- Issue date Jul 15, 1997
- Integrated Device Technology, Inc.
- Philip A. Bourekas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware control structure and method for off-chip monitoring entri...
- Patent number 5,636,363
- Issue date Jun 3, 1997
- Integrated Device Technology, Inc.
- Philip A. Bourekas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplexed status and diagnostic pins in a microprocessor with on-...
- Patent number 5,517,659
- Issue date May 14, 1996
- Integrated Device Technology, Inc.
- Philip A. Bourekas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Minimum pin-count multiplexed address/data bus with byte enable and...
- Patent number 5,386,579
- Issue date Jan 31, 1995
- Integrated Device Technology, Inc.
- Philip A. Bourekas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Structure and method for monitoring an internal cache
- Patent number 5,317,711
- Issue date May 31, 1994
- Integrated Device Technology, Inc.
- Philip A. Bourekas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast shifter method and structure
- Patent number 4,905,178
- Issue date Feb 27, 1990
- Performance Semiconductor Corporation
- Yeshayahu Mor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor system with extended arithmetic logic unit
- Patent number 4,884,231
- Issue date Nov 28, 1989
- Performance Semiconductor Corporation
- Yeshayahu Mor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and structure for performing floating point comparison
- Patent number 4,858,166
- Issue date Aug 15, 1989
- Performance Semiconductor Corporation
- Yeshayahu Schatzberger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-line overflow response system and ALU branching structure
- Patent number 4,811,211
- Issue date Mar 7, 1989
- Performance Semiconductor Corporation
- Leonardo Sandman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register addressing system for efficient microroutine sharing and o...
- Patent number 4,807,124
- Issue date Feb 21, 1989
- Performance Semiconductor Corporation
- Yeshayahu Mor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor having multiplication circuitry implementing a modif...
- Patent number 4,755,962
- Issue date Jul 5, 1988
- Fairchild Camera and Instrument
- Yeshayahu Mor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with compact mapped programmable logic array
- Patent number 4,713,750
- Issue date Dec 15, 1987
- Fairchild Camera and Instrument Corporation
- Nabil G. Damouny
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance microprocessor system
- Patent number 4,412,283
- Issue date Oct 25, 1983
- Fairchild Camera & Instrument Corp.
- Yeshayahu Mor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with improved arithmetic logic unit data path
- Patent number 4,396,979
- Issue date Aug 2, 1983
- Fairchild Camera and Instrument Corporation
- Yeshayahu Mor
- G06 - COMPUTING CALCULATING COUNTING

Yeshayahu Mor

Person

Patents Grantslast 30 patents

Flexible reset scheme supporting normal system operation, test and...

Structure and method for multiple-level read buffer supporting opti...

Hardware control structure and method for off-chip monitoring entri...

Multiplexed status and diagnostic pins in a microprocessor with on-...

Minimum pin-count multiplexed address/data bus with byte enable and...

Structure and method for monitoring an internal cache

Fast shifter method and structure

Microprocessor system with extended arithmetic logic unit

Method and structure for performing floating point comparison

On-line overflow response system and ALU branching structure

Register addressing system for efficient microroutine sharing and o...

Microprocessor having multiplication circuitry implementing a modif...

Microprocessor with compact mapped programmable logic array

High performance microprocessor system

Microprocessor with improved arithmetic logic unit data path