Yew Keong Chong

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Bitcell architecture with time-multiplexed ports
- Patent number 11,967,365
- Issue date Apr 23, 2024
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Grant
Wordline modulation techniques
- Patent number 11,900,995
- Issue date Feb 13, 2024
- ARM Limited
- Rajiv Kumar Sisodia
- G11 - INFORMATION STORAGE
Information Patent Grant
Frontside-to-backside intermixing architecture for coupling a front...
- Patent number 11,837,543
- Issue date Dec 5, 2023
- ARM Limited
- Andy Wangkun Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Data compressor logic circuit
- Patent number 11,831,341
- Issue date Nov 28, 2023
- ARM Limited
- Shardendu Shekhar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Wordline driver architecture
- Patent number 11,688,444
- Issue date Jun 27, 2023
- ARM Limited
- Akash Bangalore Srinivasa
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory architecture with DC biasing
- Patent number 11,676,656
- Issue date Jun 13, 2023
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Column redundancy techniques
- Patent number 11,664,086
- Issue date May 30, 2023
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Grant
Flexible sizing and routing architecture
- Patent number 11,631,439
- Issue date Apr 18, 2023
- ARM Limited
- Sriram Thyagarajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Slew-load characterization
- Patent number 11,624,777
- Issue date Apr 11, 2023
- ARM Limited
- Sriram Thyagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pulse stretcher circuitry
- Patent number 11,588,477
- Issue date Feb 21, 2023
- ARM Limited
- Shri Sagar Dwivedi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modular gated multiplier circuitry and multiplication technique
- Patent number 11,586,445
- Issue date Feb 21, 2023
- ARM Limited
- Shardendu Shekhar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory compiler techniques
- Patent number 11,567,741
- Issue date Jan 31, 2023
- ARM Limited
- Mouli Rajaram Chollangi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latch circuitry for memory applications
- Patent number 11,568,926
- Issue date Jan 31, 2023
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Cell architecture
- Patent number 11,557,583
- Issue date Jan 17, 2023
- ARM Limited
- Andy Wangkun Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory on chip
- Patent number 11,520,658
- Issue date Dec 6, 2022
- ARM Limited
- Joel Thornton Irby
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wordline driver architecture
- Patent number 11,514,979
- Issue date Nov 29, 2022
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Read assist circuitry for memory applications
- Patent number 11,475,944
- Issue date Oct 18, 2022
- ARM Limited
- Rahul Mathur
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory architecture with pulsed-bias power
- Patent number 11,468,941
- Issue date Oct 11, 2022
- ARM Limited
- Akash Bangalore Srinivasa
- G11 - INFORMATION STORAGE
Information Patent Grant
Backside power rail architecture
- Patent number 11,443,777
- Issue date Sep 13, 2022
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Buried power rail structure for providing multi-domain power supply...
- Patent number 11,380,384
- Issue date Jul 5, 2022
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Bitcell architecture with buried ground rail
- Patent number 11,328,750
- Issue date May 10, 2022
- ARM Limited
- Ettore Amirante
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power-gating techniques with buried metal
- Patent number 11,322,197
- Issue date May 3, 2022
- ARM Limited
- Rajiv Kumar Sisodia
- G11 - INFORMATION STORAGE
Information Patent Grant
Computer implemented system and method for generating a layout of a...
- Patent number 11,288,432
- Issue date Mar 29, 2022
- ARM Limited
- Andy Wangkun Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buried metal technique for critical signal nets
- Patent number 11,271,567
- Issue date Mar 8, 2022
- ARM Limited
- Andy Wangkun Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory multiplexing techniques
- Patent number 11,200,922
- Issue date Dec 14, 2021
- ARM Limited
- Sriram Thyagarajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Bitcell with multiple read bitlines
- Patent number 11,170,843
- Issue date Nov 9, 2021
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Transistor gate arrangement to modify driver signal characteristics
- Patent number 11,145,651
- Issue date Oct 12, 2021
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Grant
Configurable control of integrated circuits
- Patent number 11,133,043
- Issue date Sep 28, 2021
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Read and write techniques
- Patent number 11,087,834
- Issue date Aug 10, 2021
- ARM Limited
- Yew Keong Chong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Metal layout techniques
- Patent number 11,068,639
- Issue date Jul 20, 2021
- ARM Limited
- Marlin Wayne Frederick
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Buried Metal Techniques for Memory Applications
- Publication number 20240153551
- Publication date May 9, 2024
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Multi-Port Bitcell Architecture
- Publication number 20240135988
- Publication date Apr 25, 2024
- ARM Limited
- Vianney Antoine Choserot
- G11 - INFORMATION STORAGE
Information Patent Application
Circuitry for Memory Address Collision Prevention
- Publication number 20240012748
- Publication date Jan 11, 2024
- ARM Limited
- Andy Wangkun Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuits and Methods for I/O Circuitry TSV Coupling
- Publication number 20230411351
- Publication date Dec 21, 2023
- ARM Limited
- Andy Wangkun Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-Port Memory Architecture
- Publication number 20230410896
- Publication date Dec 21, 2023
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Application
Configurable Scan Chain Architecture for Multi-Port Memory
- Publication number 20230402122
- Publication date Dec 14, 2023
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
FLEXIBLE SIZING AND ROUTING ARCHITECTURE
- Publication number 20230136348
- Publication date May 4, 2023
- ARM Limited
- Sriram Thyagarajan
- G11 - INFORMATION STORAGE
Information Patent Application
Column Redundancy Techniques
- Publication number 20230016339
- Publication date Jan 19, 2023
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Application
Wordline Driver Architecture
- Publication number 20220319585
- Publication date Oct 6, 2022
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Wordline Modulation Techniques
- Publication number 20220319586
- Publication date Oct 6, 2022
- ARM Limited
- Rajiv Kumar Sisodia
- G11 - INFORMATION STORAGE
Information Patent Application
Metal Routing Techniques
- Publication number 20220309225
- Publication date Sep 29, 2022
- ARM Limited
- Sriram Thyagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Wordline Driver Architecture
- Publication number 20220310144
- Publication date Sep 29, 2022
- ARM Limited
- Akash Bangalore Srinivasa
- G11 - INFORMATION STORAGE
Information Patent Application
Buried Power Rail Architecture
- Publication number 20220293522
- Publication date Sep 15, 2022
- ARM Limited
- Sriram Thyagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Architecture with Pulsed-Bias Power
- Publication number 20220284942
- Publication date Sep 8, 2022
- ARM Limited
- Akash Bangalore Srinivasa
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Architecture with DC Biasing
- Publication number 20220254411
- Publication date Aug 11, 2022
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Backside Power Supply Techniques
- Publication number 20220123751
- Publication date Apr 21, 2022
- ARM Limited
- Sriram Thyagarajan
- G11 - INFORMATION STORAGE
Information Patent Application
Power-Gating Techniques with Buried Metal
- Publication number 20220122656
- Publication date Apr 21, 2022
- ARM Limited
- Rajiv Kumar Sisodia
- G11 - INFORMATION STORAGE
Information Patent Application
Backside Power Rail Architecture
- Publication number 20220084561
- Publication date Mar 17, 2022
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Buried Metal Technique for Critical Signal Nets
- Publication number 20220077857
- Publication date Mar 10, 2022
- ARM Limited
- Andy Wangkun Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Cell Architecture
- Publication number 20220077134
- Publication date Mar 10, 2022
- ARM Limited
- Andy Wangkun Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Frontside-to-Backside Intermixing Architecture
- Publication number 20220068813
- Publication date Mar 3, 2022
- ARM Limited
- Andy Wangkun Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
POWER NETWORK FOR PROVIDING POWER SUPPLY TO MEMORY DEVICE
- Publication number 20220068346
- Publication date Mar 3, 2022
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Compiler Techniques
- Publication number 20210389934
- Publication date Dec 16, 2021
- ARM Limited
- Mouli Rajaram Chollangi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Slew-Load Characterization
- Publication number 20210333320
- Publication date Oct 28, 2021
- ARM Limited
- Sriram Thyagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BITCELL WITH MULTIPLE READ BITLINES
- Publication number 20210295898
- Publication date Sep 23, 2021
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Configurable Control of Integrated Circuits
- Publication number 20210241807
- Publication date Aug 5, 2021
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Multiplexing Techniques
- Publication number 20210193195
- Publication date Jun 24, 2021
- ARM Limited
- Sriram Thyagarajan
- G11 - INFORMATION STORAGE
Information Patent Application
Multiplier Circuitry
- Publication number 20210157603
- Publication date May 27, 2021
- ARM Limited
- Shardendu Shekhar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-VOLATILE MEMORY ON CHIP
- Publication number 20210133027
- Publication date May 6, 2021
- ARM Limited
- Joel Thornton IRBY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pulse Stretcher Circuitry
- Publication number 20210111711
- Publication date Apr 15, 2021
- ARM Limited
- Shri Sagar Dwivedi
- G06 - COMPUTING CALCULATING COUNTING

Yew Keong Chong

Person

Patents Grantslast 30 patents

Bitcell architecture with time-multiplexed ports

Wordline modulation techniques

Frontside-to-backside intermixing architecture for coupling a front...

Data compressor logic circuit

Wordline driver architecture

Memory architecture with DC biasing

Column redundancy techniques

Flexible sizing and routing architecture

Slew-load characterization

Pulse stretcher circuitry

Modular gated multiplier circuitry and multiplication technique

Memory compiler techniques

Latch circuitry for memory applications

Cell architecture

Non-volatile memory on chip

Wordline driver architecture

Read assist circuitry for memory applications

Memory architecture with pulsed-bias power

Backside power rail architecture

Buried power rail structure for providing multi-domain power supply...

Bitcell architecture with buried ground rail

Power-gating techniques with buried metal

Computer implemented system and method for generating a layout of a...

Buried metal technique for critical signal nets

Memory multiplexing techniques

Bitcell with multiple read bitlines

Transistor gate arrangement to modify driver signal characteristics

Configurable control of integrated circuits

Read and write techniques

Metal layout techniques

Patents Applicationslast 30 patents

Buried Metal Techniques for Memory Applications

Multi-Port Bitcell Architecture

Circuitry for Memory Address Collision Prevention

Circuits and Methods for I/O Circuitry TSV Coupling

Multi-Port Memory Architecture

Configurable Scan Chain Architecture for Multi-Port Memory

FLEXIBLE SIZING AND ROUTING ARCHITECTURE

Column Redundancy Techniques

Wordline Driver Architecture

Wordline Modulation Techniques

Metal Routing Techniques

Wordline Driver Architecture

Buried Power Rail Architecture

Memory Architecture with Pulsed-Bias Power

Memory Architecture with DC Biasing

Backside Power Supply Techniques

Power-Gating Techniques with Buried Metal

Backside Power Rail Architecture

Buried Metal Technique for Critical Signal Nets

Cell Architecture

Frontside-to-Backside Intermixing Architecture

POWER NETWORK FOR PROVIDING POWER SUPPLY TO MEMORY DEVICE

Memory Compiler Techniques

Slew-Load Characterization

BITCELL WITH MULTIPLE READ BITLINES

Configurable Control of Integrated Circuits

Memory Multiplexing Techniques

Multiplier Circuitry

NON-VOLATILE MEMORY ON CHIP

Pulse Stretcher Circuitry