Yi-Ching Chiou

Person

Hsinchu, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-bit flip-flop with power saving feature
- Patent number 11,714,125
- Issue date Aug 1, 2023
- Mediatek Inc.
- Kin-Hooi Dia
- G01 - MEASURING TESTING
Information Patent Grant
System and method for polishing substrate
- Patent number 10,272,540
- Issue date Apr 30, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd
- Jiun-Yu Lai
- B24 - GRINDING POLISHING
Information Patent Grant
System and method for polishing substrate
- Patent number 9,669,514
- Issue date Jun 6, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jiun-Yu Lai
- B24 - GRINDING POLISHING

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor devices and multi-bit flip-flop circuits having an as...
- Publication number 20230179187
- Publication date Jun 8, 2023
- MEDIATEK INC.
- Yi-Horng Chiou
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MULTI-BIT FLIP-FLOP WITH POWER SAVING FEATURE
- Publication number 20210359667
- Publication date Nov 18, 2021
- MEDIATEK INC.
- Kin-Hooi Dia
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM AND METHOD FOR POLISHING SUBSTRATE
- Publication number 20170246723
- Publication date Aug 31, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jiun-Yu LAI
- B24 - GRINDING POLISHING
Information Patent Application
SYSTEM AND METHOD FOR POLISHING SUBSTRATE
- Publication number 20160346899
- Publication date Dec 1, 2016
- Taiwan Semiconductor Manufacturing Co., LTD
- Jiun-Yu LAI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DISPLAY APPARATUS
- Publication number 20140085853
- Publication date Mar 27, 2014
- WINTEK CORPORATION
- Yi-Shian Chiou
- G02 - OPTICS
Information Patent Application
TOUCH STEREOSCOPIC DISPLAY DEVICE
- Publication number 20140028594
- Publication date Jan 30, 2014
- WINTEK CORPORATION
- Wei-Chou Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PLANAR ASYMMETRIC CROSSOVER COUPLER
- Publication number 20110309894
- Publication date Dec 22, 2011
- NATIONAL CHIAO-TUNG UNIVERSITY
- Jen-Tsai Kuo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL-BAND COUPLER UNIT AND DUAL-BAND COUPLER THEREOF AND RECEIVER T...
- Publication number 20100317313
- Publication date Dec 16, 2010
- NATIONAL CHIAO-TUNG UNIVERSITY
- Jen-Tsai Kuo
- H01 - BASIC ELECTRIC ELEMENTS

Yi-Ching Chiou

Person

Patents Grantslast 30 patents

Multi-bit flip-flop with power saving feature

System and method for polishing substrate

System and method for polishing substrate

Patents Applicationslast 30 patents

Semiconductor devices and multi-bit flip-flop circuits having an as...

MULTI-BIT FLIP-FLOP WITH POWER SAVING FEATURE

SYSTEM AND METHOD FOR POLISHING SUBSTRATE

SYSTEM AND METHOD FOR POLISHING SUBSTRATE

DISPLAY APPARATUS

TOUCH STEREOSCOPIC DISPLAY DEVICE

PLANAR ASYMMETRIC CROSSOVER COUPLER

DUAL-BAND COUPLER UNIT AND DUAL-BAND COUPLER THEREOF AND RECEIVER T...