Yi Xu

Person

Folsom, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Through-substrate void filling for an integrated circuit assembly
- Patent number 12,237,300
- Issue date Feb 25, 2025
- Intel Corporation
- Tyler Leuten
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die over mold stacked semiconductor package
- Patent number 11,948,917
- Issue date Apr 2, 2024
- Intel Corporation
- Florence Pon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Choked flow cooling
- Patent number 11,901,264
- Issue date Feb 13, 2024
- SK hynix NAND Product Solutions Corp.
- Mark Forsnes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual head capillary design for vertical wire bond
- Patent number 11,894,334
- Issue date Feb 6, 2024
- Intel Corporation
- Yuhong Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pad design for thermal fatigue resistance and interconnect joint re...
- Patent number 11,848,292
- Issue date Dec 19, 2023
- Intel Corporation
- Sireesha Gogineni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-die, vertical-wire package-in-package apparatus, and methods...
- Patent number 11,749,653
- Issue date Sep 5, 2023
- Intel Corporation
- Hyoung Il Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded component and methods of making the same
- Patent number 11,710,674
- Issue date Jul 25, 2023
- Intel Corporation
- Yi Elyn Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bowl shaped pad
- Patent number 11,694,976
- Issue date Jul 4, 2023
- Intel Corporation
- Yuhong Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Temporary interconnect for use in testing a semiconductor package
- Patent number 11,658,079
- Issue date May 23, 2023
- Intel Corporation
- Hyoung Il Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shrinkable package assembly
- Patent number 11,652,031
- Issue date May 16, 2023
- Intel Corporation
- Florence Pon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package design for solder joint reliability
- Patent number 11,569,144
- Issue date Jan 31, 2023
- Intel Corporation
- Yuhong Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Diode for use in testing semiconductor packages
- Patent number 11,545,464
- Issue date Jan 3, 2023
- Intel Corporation
- Yi Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Solder mask design for delamination prevention
- Patent number 11,476,174
- Issue date Oct 18, 2022
- Intel Corporation
- James Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded component and methods of making the same
- Patent number 11,315,843
- Issue date Apr 26, 2022
- Intel Corporation
- Yi Elyn Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interposer for electrically connecting stacked integrated circuit d...
- Patent number 11,211,314
- Issue date Dec 28, 2021
- Intel Corporation
- Hyoung Il Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package having singular wire bond on bonding pads
- Patent number 11,056,465
- Issue date Jul 6, 2021
- Intel Corporation
- Yi Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Through mold via (TMV) using stacked modular mold rings
- Patent number 10,879,152
- Issue date Dec 29, 2020
- Intel Corporation
- Yi Elyn Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with thermal fins
- Patent number 10,573,575
- Issue date Feb 25, 2020
- Intel Corporation
- Hyoung Il Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D package having edge-aligned die stack with direct inter-die wire...
- Patent number 10,332,899
- Issue date Jun 25, 2019
- Intel Corporation
- Yi Xu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CHOKED FLOW COOLING
- Publication number 20240170368
- Publication date May 23, 2024
- SK hynix NAND Product Solutions Corp.
- Mark Forsnes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED COMPONENT AND METHODS OF MAKING THE SAME
- Publication number 20220223487
- Publication date Jul 14, 2022
- Intel Corporation
- Yi Elyn Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH-SUBSTRATE VOID FILLING FOR AN INTEGRATED CIRCUIT ASSEMBLY
- Publication number 20220181294
- Publication date Jun 9, 2022
- Intel Corporation
- Tyler Leuten
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-DIE, VERTICAL-WIRE PACKAGE-IN-PACKAGE APPARATUS, AND METHODS...
- Publication number 20210288034
- Publication date Sep 16, 2021
- Intel Corporation
- Hyoung IL Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE OVER MOLD STACKED SEMICONDUCTOR PACKAGE
- Publication number 20200343221
- Publication date Oct 29, 2020
- Intel Corporation
- Florence PON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERPOSER WITH STEP FEATURE
- Publication number 20200312769
- Publication date Oct 1, 2020
- Intel Corporation
- Florence PON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TEMPORARY INTERCONNECT FOR USE IN TESTING A SEMICONDUCTOR PACKAGE
- Publication number 20200235018
- Publication date Jul 23, 2020
- Intel Corporation
- Hyoung Il KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIODE FOR USE IN TESTING SEMICONDUCTOR PACKAGES
- Publication number 20200212009
- Publication date Jul 2, 2020
- Intel Corporation
- Yi XU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SHRINKABLE PACKAGE ASSEMBLY
- Publication number 20200194344
- Publication date Jun 18, 2020
- Intel Corporation
- Florence PON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERPOSER FOR ELECTRICALLY CONNECTING STACKED INTEGRATED CIRCUIT D...
- Publication number 20200152558
- Publication date May 14, 2020
- Intel Corporation
- HYOUNG IL KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHOKED FLOW COOLING
- Publication number 20200135616
- Publication date Apr 30, 2020
- Intel Corporation
- Mark FORSNES
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOLDER MASK DESIGN FOR DELAMINATION PREVENTION
- Publication number 20200135602
- Publication date Apr 30, 2020
- Intel Corporation
- James ZHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL HEAD CAPILLARY DESIGN FOR VERTICAL WIRE BOND
- Publication number 20200118961
- Publication date Apr 16, 2020
- Intel Corporation
- Yuhong CAI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE WITH BUMPER FOR SOLDER JOINT RELIABILITY
- Publication number 20200118940
- Publication date Apr 16, 2020
- Intel Corporation
- Krishna Hemanth VEPAKOMMA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PRE-PATTERNED FINE-PITCH BOND PAD INTERPOSER
- Publication number 20200118991
- Publication date Apr 16, 2020
- Intel Corporation
- James ZHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE DESIGN FOR SOLDER JOINT RELIABILITY
- Publication number 20200118901
- Publication date Apr 16, 2020
- Intel Corporation
- Yuhong CAI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BOWL SHAPED PAD
- Publication number 20200118954
- Publication date Apr 16, 2020
- Intel Corporation
- Yuhong CAI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PAD DESIGN FOR THERMAL FATIGUE RESISTANCE AND INTERCONNECT JOINT RE...
- Publication number 20200118955
- Publication date Apr 16, 2020
- Intel Corporation
- Sireesha GOGINENI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED COMPONENT AND METHODS OF MAKING THE SAME
- Publication number 20190371687
- Publication date Dec 5, 2019
- Intel Corporation
- Yi Elyn Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH MOLD VIA (TMV) USING STACKED MODULAR MOLD RINGS
- Publication number 20190279919
- Publication date Sep 12, 2019
- Intel Corporation
- Yi Elyn Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE HAVING SINGULAR WIRE BOND ON BONDING PADS
- Publication number 20190273067
- Publication date Sep 5, 2019
- Intel Corporation
- Yi XU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D PACKAGE HAVING EDGE-ALIGNED DIE STACK WITH DIRECT INTER-DIE WIRE...
- Publication number 20190103409
- Publication date Apr 4, 2019
- Intel Corporation
- Yi XU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR PACKAGE WITH THERMAL FINS
- Publication number 20190067156
- Publication date Feb 28, 2019
- Intel Corporation
- Hyoung Il Kim
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Through-substrate void filling for an integrated circuit assembly

Die over mold stacked semiconductor package

Choked flow cooling

Dual head capillary design for vertical wire bond

Pad design for thermal fatigue resistance and interconnect joint re...

Multi-die, vertical-wire package-in-package apparatus, and methods...

Embedded component and methods of making the same

Bowl shaped pad

Temporary interconnect for use in testing a semiconductor package

Shrinkable package assembly

Semiconductor package design for solder joint reliability

Diode for use in testing semiconductor packages

Solder mask design for delamination prevention

Embedded component and methods of making the same

Interposer for electrically connecting stacked integrated circuit d...

Semiconductor package having singular wire bond on bonding pads

Through mold via (TMV) using stacked modular mold rings

Semiconductor package with thermal fins

3D package having edge-aligned die stack with direct inter-die wire...

Patents Applicationslast 30 patents

CHOKED FLOW COOLING

EMBEDDED COMPONENT AND METHODS OF MAKING THE SAME

THROUGH-SUBSTRATE VOID FILLING FOR AN INTEGRATED CIRCUIT ASSEMBLY

MULTI-DIE, VERTICAL-WIRE PACKAGE-IN-PACKAGE APPARATUS, AND METHODS...

DIE OVER MOLD STACKED SEMICONDUCTOR PACKAGE

INTERPOSER WITH STEP FEATURE

TEMPORARY INTERCONNECT FOR USE IN TESTING A SEMICONDUCTOR PACKAGE

DIODE FOR USE IN TESTING SEMICONDUCTOR PACKAGES

SHRINKABLE PACKAGE ASSEMBLY

INTERPOSER FOR ELECTRICALLY CONNECTING STACKED INTEGRATED CIRCUIT D...

CHOKED FLOW COOLING

SOLDER MASK DESIGN FOR DELAMINATION PREVENTION

DUAL HEAD CAPILLARY DESIGN FOR VERTICAL WIRE BOND

DIE WITH BUMPER FOR SOLDER JOINT RELIABILITY

PRE-PATTERNED FINE-PITCH BOND PAD INTERPOSER

SEMICONDUCTOR PACKAGE DESIGN FOR SOLDER JOINT RELIABILITY

BOWL SHAPED PAD

PAD DESIGN FOR THERMAL FATIGUE RESISTANCE AND INTERCONNECT JOINT RE...

EMBEDDED COMPONENT AND METHODS OF MAKING THE SAME

THROUGH MOLD VIA (TMV) USING STACKED MODULAR MOLD RINGS

SEMICONDUCTOR PACKAGE HAVING SINGULAR WIRE BOND ON BONDING PADS

3D PACKAGE HAVING EDGE-ALIGNED DIE STACK WITH DIRECT INTER-DIE WIRE...

SEMICONDUCTOR PACKAGE WITH THERMAL FINS