Yi Zheng

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Austin, TX, US

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Patents Grantslast 30 patents

Information Patent Grant
Architecture for managing asynchronous resets in a system-on-a-chip
- Patent number 12,259,764
- Issue date Mar 25, 2025
- NXP USA, INC.
- Kumar Abhishek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault detection during entry to or exit from low power mode
- Patent number 12,124,309
- Issue date Oct 22, 2024
- NXP USA, INC.
- Kumar Abhishek
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SYSTEMS AND METHODS FOR STRESS DETECTION USING KINEMATIC DATA
- Publication number 20240289626
- Publication date Aug 29, 2024
- Board of Regents, The University of Texas System
- Ann MAJEWICZ FEY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARCHITECTURE FOR MANAGING ASYNCHRONOUS RESETS IN A SYSTEM-ON-A-CHIP
- Publication number 20240192745
- Publication date Jun 13, 2024
- NXP USA, Inc.
- Kumar Abhishek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAULT DETECTION DURING ENTRY TO OR EXIT FROM LOW POWER MODE
- Publication number 20240160265
- Publication date May 16, 2024
- NXP USA, Inc.
- Kumar Abhishek
- G06 - COMPUTING CALCULATING COUNTING