Yidnekachew S. Mekonnen

Person

Phoenix, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Package pin pattern for device-to-device connection
- Patent number 12,073,906
- Issue date Aug 27, 2024
- Intel Corporation
- Chong J. Zhao
- G11 - INFORMATION STORAGE
Information Patent Grant
Low loss and low cross talk transmission lines with stacked dielect...
- Patent number 11,791,528
- Issue date Oct 17, 2023
- Intel Corporation
- Adel A. Elsherbini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple die package using an embedded bridge connecting dies
- Patent number 11,742,293
- Issue date Aug 29, 2023
- Intel Corporation
- Yidnekachew S. Mekonnen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Horizontal pitch translation using embedded bridge dies
- Patent number 11,694,952
- Issue date Jul 4, 2023
- Intel Corporation
- Sujit Sharan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Minimization of insertion loss variation in through-silicon vias (T...
- Patent number 11,545,416
- Issue date Jan 3, 2023
- Intel Corporation
- Jianyong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Tunable passive semiconductor elements
- Patent number 11,437,366
- Issue date Sep 6, 2022
- Intel Corporation
- Zhichao Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low loss and low cross talk transmission lines having l-shaped cros...
- Patent number 11,329,358
- Issue date May 10, 2022
- Intel Corporation
- Adel A. Elsherbini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
EMIB copper layer for signal and power routing
- Patent number 11,322,445
- Issue date May 3, 2022
- Intel Corporation
- Yidnekachew S. Mekonnen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Horizontal pitch translation using embedded bridge dies
- Patent number 11,276,635
- Issue date Mar 15, 2022
- Intel Corporation
- Sujit Sharan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to achieve variable dielectric thickness in packages for bet...
- Patent number 11,145,583
- Issue date Oct 12, 2021
- Intel Corporation
- Digvijay Raorane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Simplified multimode signaling techniques
- Patent number 10,992,342
- Issue date Apr 27, 2021
- Intel Corporation
- Yidnekachew S. Mekonnen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Package power delivery using plane and shaped vias
- Patent number 10,971,416
- Issue date Apr 6, 2021
- Intel Corporation
- Krishna Bharath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Rlink—die to die channel interconnect configurations to improve sig...
- Patent number 10,784,204
- Issue date Sep 22, 2020
- Intel Corporation
- Kemal Aygun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaged device including a transmission line associated with one o...
- Patent number 10,651,525
- Issue date May 12, 2020
- Intel Corporation
- Adel A. Elsherbini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package power delivery using plane and shaped vias
- Patent number 10,410,939
- Issue date Sep 10, 2019
- Intel Corporation
- Krishna Bharath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Rlink-ground shielding attachment structures and shadow voiding for...
- Patent number 10,396,036
- Issue date Aug 27, 2019
- Intel Corporation
- Yu Amos Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package-integrated microchannels
- Patent number 10,186,465
- Issue date Jan 22, 2019
- Intel Corporation
- Feras Eid
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low loss and low cross talk transmission lines using shaped vias
- Patent number 9,992,859
- Issue date Jun 5, 2018
- Intel Corporation
- Adel A. Elsherbini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package stack
- Patent number 9,859,253
- Issue date Jan 2, 2018
- Intel Corporation
- Saikumar Jayaraman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mitigation of far-end crosstalk induced by routing and out-of-plane...
- Patent number 9,515,031
- Issue date Dec 6, 2016
- Intel Corporation
- Nevin Altunyurt
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND APPARATUS TO IMPROVE SIGNAL INTEGRITY PERFORMANCE IN IN...
- Publication number 20230352416
- Publication date Nov 2, 2023
- Intel Corporation
- Cemil Geyik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPLE DIE PACKAGE USING AN EMBEDDED BRIDGE CONNECTING DIES
- Publication number 20230352412
- Publication date Nov 2, 2023
- Intel Corporation
- Yidnekachew S. MEKONNEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGING ARCHITECTURE WITH INTEGRATED CIRCUIT DIES OVER INPUT/OUTP...
- Publication number 20230197675
- Publication date Jun 22, 2023
- Intel Corporation
- Gerald S. Pasdast
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW LOSS AND LOW CROSS TALK TRANSMISSION LINES USING SHAPED VIAS
- Publication number 20220231394
- Publication date Jul 21, 2022
- Intel Corporation
- Adel A. ELSHERBINI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HORIZONTAL PITCH TRANSLATION USING EMBEDDED BRIDGE DIES
- Publication number 20220157706
- Publication date May 19, 2022
- Intel Corporation
- Sujit SHARAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMIB COPPER LAYER FOR SIGNAL AND POWER ROUTING
- Publication number 20210296240
- Publication date Sep 23, 2021
- Yidnekachew S. Mekonnen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE PIN PATTERN FOR DEVICE-TO-DEVICE CONNECTION
- Publication number 20210074333
- Publication date Mar 11, 2021
- Intel Corporation
- Chong J. ZHAO
- G11 - INFORMATION STORAGE
Information Patent Application
HORIZONTAL PITCH TRANSLATION USING EMBEDDED BRIDGE DIES
- Publication number 20200381350
- Publication date Dec 3, 2020
- Intel Corporation
- Sujit SHARAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MINIMIZATION OF INSERTION LOSS VARIATION IN THROUGH-SILICON VIAS (T...
- Publication number 20200279793
- Publication date Sep 3, 2020
- Intel Corporation
- Jianyong XIE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW LOSS AND LOW CROSS TALK TRANSMISSION LINES USING SHAPED VIAS
- Publication number 20200235449
- Publication date Jul 23, 2020
- Intel Corporation
- Adel A. ELSHERBINI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TUNABLE PASSIVE SEMICONDUCTOR ELEMENTS
- Publication number 20200203337
- Publication date Jun 25, 2020
- Intel Corporation
- Zhichao Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RLINK - DIE TO DIE CHANNEL INTERCONNECT CONFIGURATIONS TO IMPROVE S...
- Publication number 20200066641
- Publication date Feb 27, 2020
- Intel Corporation
- Kemal AYGUN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SIMPLIFIED MULTIMODE SIGNALING TECHNIQUES
- Publication number 20200021330
- Publication date Jan 16, 2020
- Intel Corporation
- Yidnekachew S. Mekonnen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MULTIPLE DIE PACKAGE USING AN EMBEDDED BRIDGE CONNECTING DIES
- Publication number 20190363049
- Publication date Nov 28, 2019
- Intel Corporation
- Yidnekachew S. MEKONNEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE POWER DELIVERY USING PLANE AND SHAPED VIAS
- Publication number 20190355636
- Publication date Nov 21, 2019
- Intel Corporation
- Krishna BHARATH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO ACHIEVE VARIABLE DIELECTRIC THICKNESS IN PACKAGES FOR BET...
- Publication number 20190341342
- Publication date Nov 7, 2019
- Intel Corporation
- Digvijay RAORANE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTOR WITH BUNDLED INTERCONNECTS
- Publication number 20190252321
- Publication date Aug 15, 2019
- Intel Corporation
- Henning Braunisch
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IMPROVED PACKAGE POWER DELIVERY USING PLANE AND SHAPED VIAS
- Publication number 20180331003
- Publication date Nov 15, 2018
- Intel Corporation
- Krishna BHARATH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RLINK-GROUND SHIELDING ATTACHMENT STRUCTURES AND SHADOW VOIDING FOR...
- Publication number 20180331043
- Publication date Nov 15, 2018
- Intel Corporation
- Yu Amos ZHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW LOSS AND LOW CROSS TALK TRANSMISSION LINES USING SHAPED VIAS
- Publication number 20180288868
- Publication date Oct 4, 2018
- Intel Corporation
- Adel A. ELSHERBINI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE-INTEGRATED MICROCHANNELS
- Publication number 20180226310
- Publication date Aug 9, 2018
- Feras EID
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE STACK
- Publication number 20180005989
- Publication date Jan 4, 2018
- Intel Corporation
- Saikumar Jayaraman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low Loss and Low Cross Talk Transmission Lines using Shaped Vias
- Publication number 20170093007
- Publication date Mar 30, 2017
- Adel A. ELSHERBINI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MITIGATION OF FAR-END CROSSTALK INDUCED BY ROUTING AND OUT-OF-PLANE...
- Publication number 20140203417
- Publication date Jul 24, 2014
- Nevin Altunyurt
- H01 - BASIC ELECTRIC ELEMENTS

Yidnekachew S. Mekonnen

Person

Patents Grantslast 30 patents

Package pin pattern for device-to-device connection

Low loss and low cross talk transmission lines with stacked dielect...

Multiple die package using an embedded bridge connecting dies

Horizontal pitch translation using embedded bridge dies

Minimization of insertion loss variation in through-silicon vias (T...

Tunable passive semiconductor elements

Low loss and low cross talk transmission lines having l-shaped cros...

EMIB copper layer for signal and power routing

Horizontal pitch translation using embedded bridge dies

Method to achieve variable dielectric thickness in packages for bet...

Simplified multimode signaling techniques

Package power delivery using plane and shaped vias

Rlink—die to die channel interconnect configurations to improve sig...

Packaged device including a transmission line associated with one o...

Package power delivery using plane and shaped vias

Rlink-ground shielding attachment structures and shadow voiding for...

Package-integrated microchannels

Low loss and low cross talk transmission lines using shaped vias

Integrated circuit package stack

Mitigation of far-end crosstalk induced by routing and out-of-plane...

Patents Applicationslast 30 patents

METHODS AND APPARATUS TO IMPROVE SIGNAL INTEGRITY PERFORMANCE IN IN...

MULTIPLE DIE PACKAGE USING AN EMBEDDED BRIDGE CONNECTING DIES

PACKAGING ARCHITECTURE WITH INTEGRATED CIRCUIT DIES OVER INPUT/OUTP...

LOW LOSS AND LOW CROSS TALK TRANSMISSION LINES USING SHAPED VIAS

HORIZONTAL PITCH TRANSLATION USING EMBEDDED BRIDGE DIES

EMIB COPPER LAYER FOR SIGNAL AND POWER ROUTING

PACKAGE PIN PATTERN FOR DEVICE-TO-DEVICE CONNECTION

HORIZONTAL PITCH TRANSLATION USING EMBEDDED BRIDGE DIES

MINIMIZATION OF INSERTION LOSS VARIATION IN THROUGH-SILICON VIAS (T...

LOW LOSS AND LOW CROSS TALK TRANSMISSION LINES USING SHAPED VIAS

TUNABLE PASSIVE SEMICONDUCTOR ELEMENTS

RLINK - DIE TO DIE CHANNEL INTERCONNECT CONFIGURATIONS TO IMPROVE S...

SIMPLIFIED MULTIMODE SIGNALING TECHNIQUES

MULTIPLE DIE PACKAGE USING AN EMBEDDED BRIDGE CONNECTING DIES

PACKAGE POWER DELIVERY USING PLANE AND SHAPED VIAS

METHOD TO ACHIEVE VARIABLE DIELECTRIC THICKNESS IN PACKAGES FOR BET...

INTERCONNECTOR WITH BUNDLED INTERCONNECTS

IMPROVED PACKAGE POWER DELIVERY USING PLANE AND SHAPED VIAS

RLINK-GROUND SHIELDING ATTACHMENT STRUCTURES AND SHADOW VOIDING FOR...

LOW LOSS AND LOW CROSS TALK TRANSMISSION LINES USING SHAPED VIAS

PACKAGE-INTEGRATED MICROCHANNELS

INTEGRATED CIRCUIT PACKAGE STACK

Low Loss and Low Cross Talk Transmission Lines using Shaped Vias

MITIGATION OF FAR-END CROSSTALK INDUCED BY ROUTING AND OUT-OF-PLANE...