Yim Pun

Person

Saraoga, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multiple multi-threaded processors having an L1 instruction cache a...
- Patent number 8,087,024
- Issue date Dec 27, 2011
- Intel Corporation
- Sridhar Lakshmanamurthy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Thread-based engine cache partitioning
- Patent number 7,536,692
- Issue date May 19, 2009
- Intel Corporation
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to assemble data segments into full packets fo...
- Patent number 7,313,140
- Issue date Dec 25, 2007
- Intel Corporation
- Sridhar Lakshmanamurthy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Processing element with next and previous neighbor registers for di...
- Patent number 7,275,145
- Issue date Sep 25, 2007
- Intel Corporation
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to communicate flow control information in a d...
- Patent number 7,251,219
- Issue date Jul 31, 2007
- Intel Corporation
- Sridhar Lakshmanamurthy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for improving network router line rate perform...
- Patent number 7,103,821
- Issue date Sep 5, 2006
- Intel Corporation
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for header splitting/splicing and automating r...
- Patent number 7,039,054
- Issue date May 2, 2006
- Intel Corporation
- Charles E. Narad
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Automatic voltage detector control circuitry
- Patent number 5,343,086
- Issue date Aug 30, 1994
- Intel Corporation
- Wing-Cho Fung
- G05 - CONTROLLING REGULATING

Patents Applicationslast 30 patents

Information Patent Application
Multiple multi-threaded processors having an L1 instruction cache a...
- Publication number 20090089546
- Publication date Apr 2, 2009
- Intel Corporation
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processing element with next and previous neighbor registers
- Publication number 20050149691
- Publication date Jul 7, 2005
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Servicing engine cache requests
- Publication number 20050108479
- Publication date May 19, 2005
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Thread-based engine cache partitioning
- Publication number 20050102486
- Publication date May 12, 2005
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamically caching engine instructions
- Publication number 20050102474
- Publication date May 12, 2005
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Executing instructions on a processor
- Publication number 20050050306
- Publication date Mar 3, 2005
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and process for scheduling data packet collection
- Publication number 20040252687
- Publication date Dec 16, 2004
- Sridhar Lakshmanamurthy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus to handle the flow control in a cascaded confi...
- Publication number 20040213219
- Publication date Oct 28, 2004
- Sridhar Lakshmanamurthy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for header splitting/splicing and automating r...
- Publication number 20040098535
- Publication date May 20, 2004
- Charles E. Narad
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for improving network router line rate perform...
- Publication number 20040006725
- Publication date Jan 8, 2004
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus to assemble data segments into full packets fo...
- Publication number 20040004964
- Publication date Jan 8, 2004
- Intel Corporation
- Sridhar Lakshmanamurthy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus to communicate flow control information in a d...
- Publication number 20040004961
- Publication date Jan 8, 2004
- Sridhar Lakshmanamurthy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Person

Patents Grantslast 30 patents

Multiple multi-threaded processors having an L1 instruction cache a...

Thread-based engine cache partitioning

Method and apparatus to assemble data segments into full packets fo...

Processing element with next and previous neighbor registers for di...

Method and apparatus to communicate flow control information in a d...

Method and apparatus for improving network router line rate perform...

Method and apparatus for header splitting/splicing and automating r...

Automatic voltage detector control circuitry

Patents Applicationslast 30 patents

Multiple multi-threaded processors having an L1 instruction cache a...

Processing element with next and previous neighbor registers

Servicing engine cache requests

Thread-based engine cache partitioning

Dynamically caching engine instructions

Executing instructions on a processor

Method and process for scheduling data packet collection

Method and apparatus to handle the flow control in a cascaded confi...

Method and apparatus for header splitting/splicing and automating r...

Method and apparatus for improving network router line rate perform...

Method and apparatus to assemble data segments into full packets fo...

Method and apparatus to communicate flow control information in a d...