Ying-Ho Cheng

Person

Taipei, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Method for validating measurement data
- Patent number 11,353,324
- Issue date Jun 7, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chui-Jung Chiu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for validating measurement data
- Patent number 10,520,303
- Issue date Dec 31, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chui-Jung Chiu
- G05 - CONTROLLING REGULATING
Information Patent Grant
Photomask and method for fabricating integrated circuit
- Patent number 9,983,473
- Issue date May 29, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chun-Yu Lin
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method for validating measurement data
- Patent number 9,823,066
- Issue date Nov 21, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chui-Jung Chiu
- G05 - CONTROLLING REGULATING
Information Patent Grant
Photomask and method for fabricating integrated circuit
- Patent number 9,612,526
- Issue date Apr 4, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chun-Yu Lin
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method for validating measurement data
- Patent number 9,404,743
- Issue date Aug 2, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chui-Jung Chiu
- G05 - CONTROLLING REGULATING
Information Patent Grant
Topography-aware lithography pattern check
- Patent number 9,367,655
- Issue date Jun 14, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- I-Chang Shih
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chip level critical point analysis with manufacturer specific data
- Patent number 9,189,587
- Issue date Nov 17, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- I-Chang Shih
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of forming substrate pattern
- Patent number 9,159,577
- Issue date Oct 13, 2015
- Taiwan Semiconductor Manufacturing Company Limited
- Chun-Yu Lin
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of defining an intensity selective exposure photomask
- Patent number 9,026,957
- Issue date May 5, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Chu Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3D image profiling techniques for lithography
- Patent number 8,952,329
- Issue date Feb 10, 2015
- Taiwan Semiconductor Manufacturing Co., Ltd.
- I-Chang Shih
- G01 - MEASURING TESTING
Information Patent Grant
Model based simulation method with fast bias contour for lithograph...
- Patent number 8,910,092
- Issue date Dec 9, 2014
- Taiwan Semiconductor Manufacturing Co., Ltd.
- I-Chang Shih
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Customized patterning modulation and optimization
- Patent number 8,806,386
- Issue date Aug 12, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ying-Chou Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Practical approach to layout migration
- Patent number 8,745,554
- Issue date Jun 3, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ying-Chou Cheng
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Intensity selective exposure photomask
- Patent number 8,673,520
- Issue date Mar 18, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- George Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Target-based thermal design using dummy insertion for semiconductor...
- Patent number 8,527,918
- Issue date Sep 3, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ying-Chou Cheng
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Intensity selective exposure photomask
- Patent number 8,431,291
- Issue date Apr 30, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- George Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system, and apparatus for adjusting local and global patter...
- Patent number 8,372,742
- Issue date Feb 12, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ying-Chou Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parameterized dummy cell insertion for process enhancement
- Patent number 8,332,797
- Issue date Dec 11, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ying-Chou Cheng
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method of thermal density optimization for device and process enhan...
- Patent number 8,219,951
- Issue date Jul 10, 2012
- Taiwan Semiconductor Manufactuing Company, Ltd.
- Ying-Chou Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Table-based DFM for accurate post-layout analysis
- Patent number 8,201,111
- Issue date Jun 12, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yung-Chin Hou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for shape and timing equivalent dimension extraction
- Patent number 8,037,575
- Issue date Oct 18, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ying-Chou Cheng
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Table-based DFM for accurate post-layout analysis
- Patent number 8,001,494
- Issue date Aug 16, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yung-Chin Hou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electrical parameter extraction for integrated circuit design
- Patent number 7,783,999
- Issue date Aug 24, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsong-Hua Ou
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CUSHION FOR WEARABLE DEVICE
- Publication number 20250088782
- Publication date Mar 13, 2025
- Merry Electronics(Shenzhen) Co., Ltd.
- Ying Chen Cheng
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method for Validating Measurement Data
- Publication number 20200124411
- Publication date Apr 23, 2020
- Taiwan Semiconductor Manufacturing Co., LTD
- Chui-Jung Chiu
- G05 - CONTROLLING REGULATING
Information Patent Application
VAPOR REDUCTION DEVICE FOR A SEMICONDUCTOR WAFER
- Publication number 20190279887
- Publication date Sep 12, 2019
- Kuo Yang Ma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Validating Measurement Data
- Publication number 20180066939
- Publication date Mar 8, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chui-Jung Chiu
- G01 - MEASURING TESTING
Information Patent Application
PHOTOMASK AND METHOD FOR FABRICATING INTEGRATED CIRCUIT
- Publication number 20170160633
- Publication date Jun 8, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chun-Yu LIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for Validating Measurement Data
- Publication number 20160320183
- Publication date Nov 3, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chui-Jeng Chiu
- G01 - MEASURING TESTING
Information Patent Application
PHOTOMASK AND METHOD FOR FABRICATING INTEGRATED CIRCUIT
- Publication number 20160062226
- Publication date Mar 3, 2016
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chun-Yu LIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF FORMING SUBSTRATE PATTERN
- Publication number 20150235857
- Publication date Aug 20, 2015
- Taiwan Semiconductor Manufacturing Company Limited
- CHUN-YU LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Chip Level Critical Point Analysis with Manufacturer Specific Data
- Publication number 20150100927
- Publication date Apr 9, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- I-Chang Shih
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and System for Image-Based Defect Alignment
- Publication number 20140226893
- Publication date Aug 14, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jen-Chieh Lo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF DEFINING AN INTENSITY SELECTIVE EXPOSURE PHOTOMASK
- Publication number 20140170537
- Publication date Jun 19, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- George Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Topography-Aware Lithography Pattern Check
- Publication number 20130267047
- Publication date Oct 10, 2013
- Taiwan Semiconductor Manufacturing Company Ltd.
- I-Chang Shih
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TARGET-BASED DUMMY INSERTION FOR SEMICONDUCTOR DEVICES
- Publication number 20130061196
- Publication date Mar 7, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ying-Chou Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARAMETERIZED DUMMY CELL INSERTION FOR PROCESS ENHANCEMENT
- Publication number 20120144361
- Publication date Jun 7, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ying-Chou Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTENSITY SELECTIVE EXPOSURE PHOTOMASK
- Publication number 20120040278
- Publication date Feb 16, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd., ("TSMC")
- George Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Table-Based DFM for Accurate Post-Layout Analysis
- Publication number 20110289466
- Publication date Nov 24, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yung-Chin HOU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTENSITY SELECTIVE EXPOSURE PHOTOMASK
- Publication number 20110217630
- Publication date Sep 8, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd., ("TSMC")
- George Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF THERMAL DENSITY OPTIMIZATION FOR DEVICE AND PROCESS ENHAN...
- Publication number 20110214101
- Publication date Sep 1, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ying-Chou Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, SYSTEM, AND APPARATUS FOR ADJUSTING LOCAL AND GLOBAL PATTER...
- Publication number 20110204470
- Publication date Aug 25, 2011
- TAIWAN SEMICONDOCTOR MANUFACTURING COMPANY, LTD.
- Ying-Chou Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Practical Approach to Layout Migration
- Publication number 20110161907
- Publication date Jun 30, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ying-Chou Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CUSTOMIZED PATTERNING MODULATION AND OPTIMIZATION
- Publication number 20110124193
- Publication date May 26, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ying-Chou Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TABLE-BASED DFM FOR ACCURATE POST-LAYOUT ANALYSIS
- Publication number 20100095253
- Publication date Apr 15, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yung-Chin HOU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR SHAPE AND TIMING EQUIVALENT DIMENSION EXTRACTION
- Publication number 20090222785
- Publication date Sep 3, 2009
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ying-Chou CHENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Electrical Parameter Extraction for Integrated Circuit Design
- Publication number 20090187866
- Publication date Jul 23, 2009
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsong-Hua Ou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method to eliminate copper hillocks and to reduce copper stress
- Publication number 20040092100
- Publication date May 13, 2004
- TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY
- Ying-Ho Cheng
- H01 - BASIC ELECTRIC ELEMENTS

Ying-Ho Cheng

Person

Patents Grantslast 30 patents

Method for validating measurement data

Method for validating measurement data

Photomask and method for fabricating integrated circuit

Method for validating measurement data

Photomask and method for fabricating integrated circuit

Method for validating measurement data

Topography-aware lithography pattern check

Chip level critical point analysis with manufacturer specific data

Method of forming substrate pattern

Method of defining an intensity selective exposure photomask

3D image profiling techniques for lithography

Model based simulation method with fast bias contour for lithograph...

Customized patterning modulation and optimization

Practical approach to layout migration

Intensity selective exposure photomask

Target-based thermal design using dummy insertion for semiconductor...

Intensity selective exposure photomask

Method, system, and apparatus for adjusting local and global patter...

Parameterized dummy cell insertion for process enhancement

Method of thermal density optimization for device and process enhan...

Table-based DFM for accurate post-layout analysis

Method for shape and timing equivalent dimension extraction

Table-based DFM for accurate post-layout analysis

Electrical parameter extraction for integrated circuit design

Patents Applicationslast 30 patents

CUSHION FOR WEARABLE DEVICE

Method for Validating Measurement Data

VAPOR REDUCTION DEVICE FOR A SEMICONDUCTOR WAFER

Method for Validating Measurement Data

PHOTOMASK AND METHOD FOR FABRICATING INTEGRATED CIRCUIT

Method for Validating Measurement Data

PHOTOMASK AND METHOD FOR FABRICATING INTEGRATED CIRCUIT

METHOD OF FORMING SUBSTRATE PATTERN

Chip Level Critical Point Analysis with Manufacturer Specific Data

Method and System for Image-Based Defect Alignment

METHOD OF DEFINING AN INTENSITY SELECTIVE EXPOSURE PHOTOMASK

Topography-Aware Lithography Pattern Check

TARGET-BASED DUMMY INSERTION FOR SEMICONDUCTOR DEVICES

PARAMETERIZED DUMMY CELL INSERTION FOR PROCESS ENHANCEMENT

INTENSITY SELECTIVE EXPOSURE PHOTOMASK

Table-Based DFM for Accurate Post-Layout Analysis

INTENSITY SELECTIVE EXPOSURE PHOTOMASK

METHOD OF THERMAL DENSITY OPTIMIZATION FOR DEVICE AND PROCESS ENHAN...

METHOD, SYSTEM, AND APPARATUS FOR ADJUSTING LOCAL AND GLOBAL PATTER...

Practical Approach to Layout Migration

CUSTOMIZED PATTERNING MODULATION AND OPTIMIZATION

TABLE-BASED DFM FOR ACCURATE POST-LAYOUT ANALYSIS

METHOD FOR SHAPE AND TIMING EQUIVALENT DIMENSION EXTRACTION

Electrical Parameter Extraction for Integrated Circuit Design

Method to eliminate copper hillocks and to reduce copper stress