Yingda Dong

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Detrapping electrons to prevent quick charge loss during program ve...
- Patent number 11,967,387
- Issue date Apr 23, 2024
- Micron Technology, Inc.
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic devices comprising reduced charge confinement regions in...
- Patent number 11,956,954
- Issue date Apr 9, 2024
- Micron Technology, Inc.
- Yifen Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced gradient seeding scheme during a program operation in a me...
- Patent number 11,901,010
- Issue date Feb 13, 2024
- Micron Technology, Inc.
- Vinh Q. Diep
- G11 - INFORMATION STORAGE
Information Patent Grant
Distributed compaction of logical states to reduce program time
- Patent number 11,791,003
- Issue date Oct 17, 2023
- Micron Technology, Inc.
- Kalyan Chakravarthy Kavalipurapu
- G11 - INFORMATION STORAGE
Information Patent Grant
Short program verify recovery with reduced programming disturbance...
- Patent number 11,749,359
- Issue date Sep 5, 2023
- Micron Technology, Inc.
- Hong-Yan Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Short program verify recovery with reduced programming disturbance...
- Patent number 11,688,471
- Issue date Jun 27, 2023
- Micron Technology, Inc.
- Hong-Yan Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual verify for quick charge loss reduction in memory cells
- Patent number 11,688,474
- Issue date Jun 27, 2023
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and methods for seeding operations concurrently with data...
- Patent number 11,688,476
- Issue date Jun 27, 2023
- Micron Technology, Inc.
- Jun Xu
- G11 - INFORMATION STORAGE
Information Patent Grant
Pre-boosting scheme during a program operation in a memory sub-system
- Patent number 11,670,372
- Issue date Jun 6, 2023
- Micron Technology, Inc.
- Hong-Yan Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Detrapping electrons to prevent quick charge loss during program ve...
- Patent number 11,508,449
- Issue date Nov 22, 2022
- Micron Technology, Inc.
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Distributed compaction of logical states to reduce program time
- Patent number 11,488,677
- Issue date Nov 1, 2022
- Micron Technology, Inc.
- Kalyan Chakravarthy Kavalipurapu
- G11 - INFORMATION STORAGE
Information Patent Grant
Three dimensional ferroelectric memory
- Patent number 11,380,709
- Issue date Jul 5, 2022
- SanDisk Technologies LLC
- Yingda Dong
- G11 - INFORMATION STORAGE
Information Patent Grant
Short program verify recovery with reduced programming disturbance...
- Patent number 11,282,582
- Issue date Mar 22, 2022
- Micron Technology, Inc.
- Hong-Yan Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and methods for seeding operations concurrently with data...
- Patent number 11,238,946
- Issue date Feb 1, 2022
- Micron Technology, Inc.
- Jun Xu
- G11 - INFORMATION STORAGE
Information Patent Grant
Pre-boosting scheme during a program operation in a memory sub-system
- Patent number 11,183,245
- Issue date Nov 23, 2021
- Micron Technology, Inc.
- Hong-Yan Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-pass programming process for memory device which omits verify...
- Patent number 11,037,640
- Issue date Jun 15, 2021
- SanDisk Technologies LLC
- Ashish Baraskar
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional inverse flat NAND memory device containing partia...
- Patent number 10,998,331
- Issue date May 4, 2021
- SanDisk Technologies LLC
- Fei Zhou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and methods for seeding operations concurrently with data...
- Patent number 10,854,304
- Issue date Dec 1, 2020
- Micron Technology, Inc.
- Jun Xu
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-pass programming process for memory device which omits verify...
- Patent number 10,811,109
- Issue date Oct 20, 2020
- SanDisk Technologies LLC
- Ashish Baraskar
- G11 - INFORMATION STORAGE
Information Patent Grant
Impedance mismatch mitigation scheme that applies asymmetric voltag...
- Patent number 10,755,788
- Issue date Aug 25, 2020
- SanDisk Technologies LLC
- Peter Rabkin
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing neighbor word line interference in a two-tier memory devic...
- Patent number 10,748,627
- Issue date Aug 18, 2020
- SanDisk Technologies LLC
- Hong-Yan Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ferroelectric non-volatile memory
- Patent number 10,734,408
- Issue date Aug 4, 2020
- SanDisk Technologies LLC
- Yingda Dong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reducing read disturb in two-tier memory device by modifying durati...
- Patent number 10,685,723
- Issue date Jun 16, 2020
- SanDisk Technologies LLC
- Hong-Yan Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Erase operation in 3D NAND flash memory including pathway impedance...
- Patent number 10,650,898
- Issue date May 12, 2020
- SanDisk Technologies LLC
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reducing read disturb in two-tier memory device by modifying ramp u...
- Patent number 10,636,500
- Issue date Apr 28, 2020
- SanDisk Technologies LLC
- Hong-Yan Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-sensing scan for cross-temperature mitigation
- Patent number 10,636,488
- Issue date Apr 28, 2020
- Western Digital Technologies, Inc.
- Lei Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional flat inverse NAND memory device and method of mak...
- Patent number 10,559,588
- Issue date Feb 11, 2020
- SanDisk Technologies LLC
- Yingda Dong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Read bias adjustment for compensating threshold voltage shift due t...
- Patent number 10,541,035
- Issue date Jan 21, 2020
- SanDisk Technologies LLC
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with vpass step to reduce hot carrier injection type...
- Patent number 10,522,232
- Issue date Dec 31, 2019
- SanDisk Technologies LLC
- Hong-Yan Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory with reduced program speed variation
- Patent number 10,497,711
- Issue date Dec 3, 2019
- SanDisk Technologies LLC
- Ashish Baraskar
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ELECTRONIC DEVICES COMPRISING REDUCED CHARGE CONFINEMENT REGIONS IN...
- Publication number 20240244845
- Publication date Jul 18, 2024
- Micron Technology, Inc.
- Yifen Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED GRADIENT SEEDING SCHEME DURING A PROGRAM OPERATION IN A ME...
- Publication number 20240120010
- Publication date Apr 11, 2024
- Micron Technology, Inc.
- Vinh Q. Diep
- G11 - INFORMATION STORAGE
Information Patent Application
ENHANCED VALLEY TRACKING WITH TRIM SETTING UPDATES IN A MEMORY DEVICE
- Publication number 20240096408
- Publication date Mar 21, 2024
- Micron Technology, Inc.
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
ERASE PULSE LOOP DEPENDENT ADJUSTMENT OF SELECT GATE ERASE BIAS VOL...
- Publication number 20240071515
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
CORRECTIVE PROGRAM VERIFY OPERATION WITH IMPROVED READ WINDOW BUDGE...
- Publication number 20240071530
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
FAST PROGRAM RECOVERY WITH REDUCED PROGRAMING DISTURBANCE IN A MEMO...
- Publication number 20240028253
- Publication date Jan 25, 2024
- Micron Technology, Inc.
- Avinash Rajagiri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE INCREASE AND DECREASE TO PASS VOLTAGES FOR PROGRAMMING A...
- Publication number 20230268003
- Publication date Aug 24, 2023
- Micron Technology, Inc.
- Vinh Quang Diep
- G11 - INFORMATION STORAGE
Information Patent Application
BIAS VOLTAGE SCHEMES DURING PRE-PROGRAMMING AND PROGRAMMING PHASES
- Publication number 20230197164
- Publication date Jun 22, 2023
- Micron Technology, Inc.
- Vinh Q. Diep
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-STAGE ERASE OPERATION OF MEMORY CELLS IN A MEMORY SUB-SYSTEM
- Publication number 20230195328
- Publication date Jun 22, 2023
- Micron Technology, Inc.
- Ching-Huang Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETRAPPING ELECTRONS TO PREVENT QUICK CHARGE LOSS DURING PROGRAM VE...
- Publication number 20230044240
- Publication date Feb 9, 2023
- Micron Technology, Inc.
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE HAVING MEMORY CELL STRINGS AND SEPARATE READ AND WRIT...
- Publication number 20230031362
- Publication date Feb 2, 2023
- Micron Technology, Inc.
- Haitao Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DISTRIBUTED COMPACTION OF LOGICAL STATES TO REDUCE PROGRAM TIME
- Publication number 20230022858
- Publication date Jan 26, 2023
- Micron Technology, Inc.
- Kalyan Chakravarthy Kavalipurapu
- G11 - INFORMATION STORAGE
Information Patent Application
DUAL VERIFY FOR QUICK CHARGE LOSS REDUCTION IN MEMORY CELLS
- Publication number 20220336028
- Publication date Oct 20, 2022
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Application
SHORT PROGRAM VERIFY RECOVERY WITH REDUCED PROGRAMMING DISTURBANCE...
- Publication number 20220215890
- Publication date Jul 7, 2022
- Micron Technology, Inc.
- Hong-Yan Chen
- G11 - INFORMATION STORAGE
Information Patent Application
DETRAPPING ELECTRONS TO PREVENT QUICK CHARGE LOSS DURING PROGRAM VE...
- Publication number 20220199175
- Publication date Jun 23, 2022
- Micron Technology, Inc.
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
ENHANCED GRADIENT SEEDING SCHEME DURING A PROGRAM OPERATION IN A ME...
- Publication number 20220189555
- Publication date Jun 16, 2022
- Micron Technology, Inc.
- Vinh Q. Diep
- G11 - INFORMATION STORAGE
Information Patent Application
DISTRIBUTED COMPACTION OF LOGICAL STATES TO REDUCE PROGRAM TIME
- Publication number 20220189570
- Publication date Jun 16, 2022
- Micron Technology, Inc.
- Kalyan Chakravarthy Kavalipurapu
- G11 - INFORMATION STORAGE
Information Patent Application
SHORT PROGRAM VERIFY RECOVERY WITH REDUCED PROGRAMMING DISTURBANCE...
- Publication number 20220189565
- Publication date Jun 16, 2022
- Micron Technology, Inc.
- Hong-Yan Chen
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTRONIC DEVICES COMPRISING REDUCED CHARGE CONFINEMENT REGIONS IN...
- Publication number 20220149068
- Publication date May 12, 2022
- Micron Technology, Inc.
- Yifen Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHODS FOR SEEDING OPERATIONS CONCURRENTLY WITH DATA...
- Publication number 20220130475
- Publication date Apr 28, 2022
- Micron Technology, Inc.
- Jun Xu
- G11 - INFORMATION STORAGE
Information Patent Application
PRE-BOOSTING SCHEME DURING A PROGRAM OPERATION IN A MEMORY SUB-SYSTEM
- Publication number 20220051721
- Publication date Feb 17, 2022
- Micron Technology, Inc.
- Hong-Yan Chen
- G11 - INFORMATION STORAGE
Information Patent Application
MODIFIED SEEDING SCHEME DURING A PROGRAM OPERATION IN A MEMORY SUB-...
- Publication number 20210391016
- Publication date Dec 16, 2021
- Micron Technology, Inc.
- Hong-Yan Chen
- G11 - INFORMATION STORAGE
Information Patent Application
SHORT PROGRAM VERIFY RECOVERY WITH REDUCED PROGRAMMING DISTURBANCE...
- Publication number 20210391024
- Publication date Dec 16, 2021
- Micron Technology, Inc.
- Hong-Yan Chen
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHODS FOR SEEDING OPERATIONS CONCURRENTLY WITH DATA...
- Publication number 20210166773
- Publication date Jun 3, 2021
- Micron Technology, Inc.
- Jun Xu
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-PASS PROGRAMMING PROCESS FOR MEMORY DEVICE WHICH OMITS VERIFY...
- Publication number 20200312414
- Publication date Oct 1, 2020
- SANDISK TECHNOLOGIES LLC
- Ashish Baraskar
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-PASS PROGRAMMING PROCESS FOR MEMORY DEVICE WHICH OMITS VERIFY...
- Publication number 20200211663
- Publication date Jul 2, 2020
- SANDISK TECHNOLOGIES LLC
- Ashish Baraskar
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCING READ DISTURB IN TWO-TIER MEMORY DEVICE BY MODIFYING DURATI...
- Publication number 20200202961
- Publication date Jun 25, 2020
- SANDISK TECHNOLOGIES LLC
- Hong-Yan Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REDUCING NEIGHBOR WORD LINE INTERFERENCE IN A TWO-TIER MEMORY DEVIC...
- Publication number 20200202962
- Publication date Jun 25, 2020
- SANDISK TECHNOLOGIES LLC
- Hong-Yan Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IMPEDANCE MISMATCH MITIGATION SCHEME
- Publication number 20200143889
- Publication date May 7, 2020
- SANDISK TECHNOLOGIES LLC
- Peter Rabkin
- G11 - INFORMATION STORAGE
Information Patent Application
ERASE OPERATION IN 3D NAND
- Publication number 20200143888
- Publication date May 7, 2020
- SANDISK TECHNOLOGIES LLC
- Peter Rabkin
- G11 - INFORMATION STORAGE

Yingda Dong

Person

Patents Grantslast 30 patents

Detrapping electrons to prevent quick charge loss during program ve...

Electronic devices comprising reduced charge confinement regions in...

Enhanced gradient seeding scheme during a program operation in a me...

Distributed compaction of logical states to reduce program time

Short program verify recovery with reduced programming disturbance...

Short program verify recovery with reduced programming disturbance...

Dual verify for quick charge loss reduction in memory cells

Apparatus and methods for seeding operations concurrently with data...

Pre-boosting scheme during a program operation in a memory sub-system

Detrapping electrons to prevent quick charge loss during program ve...

Distributed compaction of logical states to reduce program time

Three dimensional ferroelectric memory

Short program verify recovery with reduced programming disturbance...

Apparatus and methods for seeding operations concurrently with data...

Pre-boosting scheme during a program operation in a memory sub-system

Multi-pass programming process for memory device which omits verify...

Three-dimensional inverse flat NAND memory device containing partia...

Apparatus and methods for seeding operations concurrently with data...

Multi-pass programming process for memory device which omits verify...

Impedance mismatch mitigation scheme that applies asymmetric voltag...

Reducing neighbor word line interference in a two-tier memory devic...

Ferroelectric non-volatile memory

Reducing read disturb in two-tier memory device by modifying durati...

Erase operation in 3D NAND flash memory including pathway impedance...

Reducing read disturb in two-tier memory device by modifying ramp u...

Multi-sensing scan for cross-temperature mitigation

Three-dimensional flat inverse NAND memory device and method of mak...

Read bias adjustment for compensating threshold voltage shift due t...

Memory device with vpass step to reduce hot carrier injection type...

Non-volatile memory with reduced program speed variation

Patents Applicationslast 30 patents

ELECTRONIC DEVICES COMPRISING REDUCED CHARGE CONFINEMENT REGIONS IN...

ENHANCED GRADIENT SEEDING SCHEME DURING A PROGRAM OPERATION IN A ME...

ENHANCED VALLEY TRACKING WITH TRIM SETTING UPDATES IN A MEMORY DEVICE

ERASE PULSE LOOP DEPENDENT ADJUSTMENT OF SELECT GATE ERASE BIAS VOL...

CORRECTIVE PROGRAM VERIFY OPERATION WITH IMPROVED READ WINDOW BUDGE...

FAST PROGRAM RECOVERY WITH REDUCED PROGRAMING DISTURBANCE IN A MEMO...

SELECTIVE INCREASE AND DECREASE TO PASS VOLTAGES FOR PROGRAMMING A...

BIAS VOLTAGE SCHEMES DURING PRE-PROGRAMMING AND PROGRAMMING PHASES

MULTI-STAGE ERASE OPERATION OF MEMORY CELLS IN A MEMORY SUB-SYSTEM

DETRAPPING ELECTRONS TO PREVENT QUICK CHARGE LOSS DURING PROGRAM VE...

MEMORY DEVICE HAVING MEMORY CELL STRINGS AND SEPARATE READ AND WRIT...

DISTRIBUTED COMPACTION OF LOGICAL STATES TO REDUCE PROGRAM TIME

DUAL VERIFY FOR QUICK CHARGE LOSS REDUCTION IN MEMORY CELLS

SHORT PROGRAM VERIFY RECOVERY WITH REDUCED PROGRAMMING DISTURBANCE...

DETRAPPING ELECTRONS TO PREVENT QUICK CHARGE LOSS DURING PROGRAM VE...

ENHANCED GRADIENT SEEDING SCHEME DURING A PROGRAM OPERATION IN A ME...

DISTRIBUTED COMPACTION OF LOGICAL STATES TO REDUCE PROGRAM TIME

SHORT PROGRAM VERIFY RECOVERY WITH REDUCED PROGRAMMING DISTURBANCE...

ELECTRONIC DEVICES COMPRISING REDUCED CHARGE CONFINEMENT REGIONS IN...

APPARATUS AND METHODS FOR SEEDING OPERATIONS CONCURRENTLY WITH DATA...

PRE-BOOSTING SCHEME DURING A PROGRAM OPERATION IN A MEMORY SUB-SYSTEM

MODIFIED SEEDING SCHEME DURING A PROGRAM OPERATION IN A MEMORY SUB-...

SHORT PROGRAM VERIFY RECOVERY WITH REDUCED PROGRAMMING DISTURBANCE...

APPARATUS AND METHODS FOR SEEDING OPERATIONS CONCURRENTLY WITH DATA...

MULTI-PASS PROGRAMMING PROCESS FOR MEMORY DEVICE WHICH OMITS VERIFY...

MULTI-PASS PROGRAMMING PROCESS FOR MEMORY DEVICE WHICH OMITS VERIFY...

REDUCING READ DISTURB IN TWO-TIER MEMORY DEVICE BY MODIFYING DURATI...

REDUCING NEIGHBOR WORD LINE INTERFERENCE IN A TWO-TIER MEMORY DEVIC...

IMPEDANCE MISMATCH MITIGATION SCHEME

ERASE OPERATION IN 3D NAND