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Patents Grantslast 30 patents

Information Patent Grant
Chip interconnection package structure and method
- Patent number 12,112,956
- Issue date Oct 8, 2024
- Institute of Semiconductors, Guangdong Academy of Sciences
- Yao Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip stack packaging structure and chip stack packaging method
- Patent number 11,869,872
- Issue date Jan 9, 2024
- Institute of Semiconductors, Guangdong Academy of Sciences
- Yao Wang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
3D STACKED PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF
- Publication number 20240153913
- Publication date May 9, 2024
- INSTITUTE OF SEMICONDUCTORS, GUANGDONG ACADEMY OF SCIENCES
- Yinhua CUI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP STACK PACKAGING STRUCTURE AND CHIP STACK PACKAGING METHOD
- Publication number 20230178514
- Publication date Jun 8, 2023
- Institute of Semiconductors, Guangdong Academy of Sciences
- Yao Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP PACKAGING METHOD AND CHIP PACKAGING STRUCTURE
- Publication number 20220375892
- Publication date Nov 24, 2022
- Institute of Semiconductors, Guangdong Academy of Sciences
- Yinhua CUI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP INTERCONNECTION PACKAGE STRUCTURE AND METHOD
- Publication number 20220254651
- Publication date Aug 11, 2022
- Institute of Semiconductors, Guangdong Academy of Sciences
- Yao WANG
- H01 - BASIC ELECTRIC ELEMENTS