Yoichiro Tanaka

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Integration of damascene type diodes and conductive wires for memor...
- Patent number 8,193,074
- Issue date Jun 5, 2012
- Sandisk 3D LLC
- Yoichiro Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Implementation of diffusion barrier in 3D memory
- Patent number 8,124,971
- Issue date Feb 28, 2012
- Sandisk 3D LLC
- Yoichiro Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Liner for tungsten/silicon dioxide interface in memory
- Patent number 8,071,475
- Issue date Dec 6, 2011
- Sandisk 3D LLC
- Yoichiro Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making damascene diodes using sacrificial material
- Patent number 7,927,977
- Issue date Apr 19, 2011
- Sandisk 3D LLC
- Raghuveer S. Makala
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for implementing diffusion barrier in 3D memory
- Patent number 7,629,253
- Issue date Dec 8, 2009
- Sandisk 3D LLC
- Yoichiro Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for controlling darkspace gap in a chamber
- Patent number 7,097,744
- Issue date Aug 29, 2006
- Applied Materials, Inc.
- Alan Barry Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Target sidewall design to reduce particle generation during magnetr...
- Patent number 6,620,296
- Issue date Sep 16, 2003
- Applied Materials, Inc.
- James Van Gogh
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Baffled perforated shield in a plasma sputtering reactor
- Patent number 6,296,747
- Issue date Oct 2, 2001
- Applied Materials, Inc.
- Yoichiro Tanaka
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method and apparatus for producing a uniform density plasma above a...
- Patent number 6,210,539
- Issue date Apr 3, 2001
- Applied Materials, Inc.
- Yoichiro Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Step coverage and overhang improvement by pedestal bias voltage mod...
- Patent number 6,197,167
- Issue date Mar 6, 2001
- Applied Materials, Inc.
- Yoichiro Tanaka
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Step coverage and overhang improvement by pedestal bias voltage mod...
- Patent number 5,976,327
- Issue date Nov 2, 1999
- Applied Materials, Inc.
- Yoichiro Tanaka
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND APPARATUS FOR LAYOUT OF THREE DIMENSIONAL MATRIX ARRAY...
- Publication number 20110095438
- Publication date Apr 28, 2011
- SanDisk 3D LLC
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Application
Method of making damascene diodes using sacrificial material
- Publication number 20110014779
- Publication date Jan 20, 2011
- SANDISK 3D LLC
- Raghuveer S. Makala
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integration of damascene type diodes and conductive wires for memor...
- Publication number 20100127358
- Publication date May 27, 2010
- SANDISK 3D LLC
- Yoichiro Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY CELL WITH PLANARIZED CARBON NANOTUBE LAYER AND METHODS OF FO...
- Publication number 20090166610
- Publication date Jul 2, 2009
- April Schricker
- G11 - INFORMATION STORAGE
Information Patent Application
LINER FOR TUNGSTEN/SILICON DIOXIDE INTERFACE IN MEMORY
- Publication number 20090085087
- Publication date Apr 2, 2009
- SANDISK CORPORATION
- Yoichiro Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for implementing diffusion barrier in 3D memory
- Publication number 20080242080
- Publication date Oct 2, 2008
- SANDISK 3D LLC
- Yoichiro Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Implementation of diffusion barrier in 3D memory
- Publication number 20080237862
- Publication date Oct 2, 2008
- SANDISK 3D LLC
- Yoichiro Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated process for sputter deposition of a conductive barrier l...
- Publication number 20070059502
- Publication date Mar 15, 2007
- Applied Materials, Inc.
- Rongjun Wang
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Conductive barrier layer, especially an alloy of ruthenium and tant...
- Publication number 20060251872
- Publication date Nov 9, 2006
- Jenn Yue Wang
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Method and apparatus for controlling darkspace gap in a chamber
- Publication number 20040251130
- Publication date Dec 16, 2004
- APPLIED MATERIALS, INC.
- Alan Barry Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Target sidewall design to reduce particle generation during magnetr...
- Publication number 20020121436
- Publication date Sep 5, 2002
- Applied Materials, Inc.
- James Van Gogh
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

Yoichiro Tanaka

Person

Patents Grantslast 30 patents

Integration of damascene type diodes and conductive wires for memor...

Implementation of diffusion barrier in 3D memory

Liner for tungsten/silicon dioxide interface in memory

Method of making damascene diodes using sacrificial material

Method for implementing diffusion barrier in 3D memory

Method and apparatus for controlling darkspace gap in a chamber

Target sidewall design to reduce particle generation during magnetr...

Baffled perforated shield in a plasma sputtering reactor

Method and apparatus for producing a uniform density plasma above a...

Step coverage and overhang improvement by pedestal bias voltage mod...

Step coverage and overhang improvement by pedestal bias voltage mod...

Patents Applicationslast 30 patents

METHODS AND APPARATUS FOR LAYOUT OF THREE DIMENSIONAL MATRIX ARRAY...

Method of making damascene diodes using sacrificial material

Integration of damascene type diodes and conductive wires for memor...

MEMORY CELL WITH PLANARIZED CARBON NANOTUBE LAYER AND METHODS OF FO...

LINER FOR TUNGSTEN/SILICON DIOXIDE INTERFACE IN MEMORY

Method for implementing diffusion barrier in 3D memory

Implementation of diffusion barrier in 3D memory

Integrated process for sputter deposition of a conductive barrier l...

Conductive barrier layer, especially an alloy of ruthenium and tant...

Method and apparatus for controlling darkspace gap in a chamber

Target sidewall design to reduce particle generation during magnetr...