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Yong-Chao Qiao

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  • Shanghai, CN
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Patents Grantslast 30 patents

  • Information Patent Grant

    Method of fabricating chip package structure
    • Patent number 8,105,881
    • Issue date Jan 31, 2012
    • ChipMOS Technologies (Bermuda) Ltd.
    • Jie-Hung Chiou
    • H01 - BASIC ELECTRIC ELEMENTS
  • Information Patent Grant

    Method of fabricating chip package
    • Patent number 8,088,650
    • Issue date Jan 3, 2012
    • Chipmos Technologies (Bermuda) Ltd.
    • Yong-Chao Qiao
    • H01 - BASIC ELECTRIC ELEMENTS
  • Information Patent Grant

    Method of fabricating chip package structure
    • Patent number 7,741,149
    • Issue date Jun 22, 2010
    • Chipmos Technologies (Bermuda) Ltd.
    • Yong-Chao Qiao
    • H01 - BASIC ELECTRIC ELEMENTS
  • Information Patent Grant

    Chip package structure
    • Patent number 7,683,462
    • Issue date Mar 23, 2010
    • ChipMOS Technologies (Bermuda) Ltd.
    • Jie-Hung Chiou
    • H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents