Yongsheng Liu

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Random sparsity handling in a systolic array
- Patent number 12,086,205
- Issue date Sep 10, 2024
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Utilizing structured sparsity in systolic arrays
- Patent number 11,977,885
- Issue date May 7, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
UTILIZING STRUCTURED SPARSITY IN SYSTOLIC ARRAYS
- Publication number 20240320000
- Publication date Sep 26, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NAMED AND CLUSTER BARRIERS
- Publication number 20240231957
- Publication date Jul 11, 2024
- Intel Corporation
- Fangwen Fu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNCHRONIZATION FOR DATA MULTICAST IN COMPUTE CORE CLUSTERS
- Publication number 20240220335
- Publication date Jul 4, 2024
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA MULTICAST IN COMPUTE CORE CLUSTERS
- Publication number 20240220254
- Publication date Jul 4, 2024
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOCALLY BIASED CACHE REPLACEMENT FOR CLUSTERED CACHE ARCHITECTURE
- Publication number 20240220420
- Publication date Jul 4, 2024
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REMOTE ATOMIC OPERATIONS FOR CLUSTERED PROCESSING ARCHITECTURE
- Publication number 20240211258
- Publication date Jun 27, 2024
- Intel Corporation
- Yuvraj Dhillon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NAMED AND CLUSTER BARRIERS
- Publication number 20240134719
- Publication date Apr 25, 2024
- Intel Corporation
- Fangwen Fu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREAD GROUP DISPATCH IN A CLUSTERED GRAPHICS ARCHITECTURE
- Publication number 20230205587
- Publication date Jun 29, 2023
- Intel Corporation
- Zamshed Iqbal Chowdhury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RANDOM SPARSITY HANDLING IN A SYSTOLIC ARRAY
- Publication number 20220309124
- Publication date Sep 29, 2022
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UTILIZING STRUCTURED SPARSITY IN SYSTOLIC ARRAYS
- Publication number 20210081201
- Publication date Mar 18, 2021
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enzyme activity profiles
- Publication number 20030143648
- Publication date Jul 31, 2003
- Benjamin F. Cravatt
- G01 - MEASURING TESTING

Yongsheng Liu

Person

Patents Grantslast 30 patents

Random sparsity handling in a systolic array

Utilizing structured sparsity in systolic arrays

Patents Applicationslast 30 patents

UTILIZING STRUCTURED SPARSITY IN SYSTOLIC ARRAYS

NAMED AND CLUSTER BARRIERS

SYNCHRONIZATION FOR DATA MULTICAST IN COMPUTE CORE CLUSTERS

DATA MULTICAST IN COMPUTE CORE CLUSTERS

LOCALLY BIASED CACHE REPLACEMENT FOR CLUSTERED CACHE ARCHITECTURE

REMOTE ATOMIC OPERATIONS FOR CLUSTERED PROCESSING ARCHITECTURE

NAMED AND CLUSTER BARRIERS

THREAD GROUP DISPATCH IN A CLUSTERED GRAPHICS ARCHITECTURE

RANDOM SPARSITY HANDLING IN A SYSTOLIC ARRAY

UTILIZING STRUCTURED SPARSITY IN SYSTOLIC ARRAYS

Enzyme activity profiles