Yoshikuni Abe

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Kanagawa, JP

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Patents Grantslast 30 patents

Information Patent Grant
Method for creating patterns for producing integrated circuits
- Patent number 7,024,638
- Issue date Apr 4, 2006
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method for creating patterns for producing integrated circuits
- Publication number 20050015739
- Publication date Jan 20, 2005
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING