Yoshinori Fujiwara

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Test mode security circuit
- Patent number 12,100,476
- Issue date Sep 24, 2024
- Micron Technology, Inc.
- Kari Crane
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for testing redundant fuse latches in a memory...
- Patent number 12,100,467
- Issue date Sep 24, 2024
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Repair element availability communication
- Patent number 12,061,795
- Issue date Aug 13, 2024
- Micron Technologies, Inc.
- Loren Jeffrey Wooley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous signal to command timing calibration for testing accuracy
- Patent number 11,955,160
- Issue date Apr 9, 2024
- Micron Technolgy, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for bad row mode
- Patent number 11,915,775
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Jack Riley
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-repair verification
- Patent number 11,791,011
- Issue date Oct 17, 2023
- Micron Technology, Inc.
- Takuya Tamano
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for power savings in row repaired memory
- Patent number 11,783,909
- Issue date Oct 10, 2023
- Micron Technology, Inc.
- James S. Rehmeyer
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory built-in self-test with adjustable pause time
- Patent number 11,742,044
- Issue date Aug 29, 2023
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods including dice latches in a semiconductor d...
- Patent number 11,727,967
- Issue date Aug 15, 2023
- Micron Technology, Inc.
- Yoshiro Riho
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for self-test mode abort circuit
- Patent number 11,705,214
- Issue date Jul 18, 2023
- Micron Technologv. Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for refresh address masking
- Patent number 11,670,356
- Issue date Jun 6, 2023
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for fuse error detection
- Patent number 11,645,134
- Issue date May 9, 2023
- Micron Technology, Inc.
- Daniel S. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for power savings in row repaired memory
- Patent number 11,417,411
- Issue date Aug 16, 2022
- Micron Technology, Inc.
- James S. Rehmeyer
- G11 - INFORMATION STORAGE
Information Patent Grant
Microelectronic device testing, and related devices, systems, and m...
- Patent number 11,410,742
- Issue date Aug 9, 2022
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Interconnected command/address resources
- Patent number 11,342,042
- Issue date May 24, 2022
- Micron Technology, Inc.
- Jason M. Johnson
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses, systems, and methods for error correction
- Patent number 11,263,078
- Issue date Mar 1, 2022
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transmit line monitoring circuitry, and related methods, devices, a...
- Patent number 11,183,260
- Issue date Nov 23, 2021
- Micron Technology Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Identifying high impedance faults in a memory device
- Patent number 11,170,837
- Issue date Nov 9, 2021
- Micron Technology
- Daniel S. Miller
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device random option inversion
- Patent number 11,081,166
- Issue date Aug 3, 2021
- Micron Technology, Inc.
- Kevin G. Werhane
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatuses to detect test probe contact at external te...
- Patent number 10,969,434
- Issue date Apr 6, 2021
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory read masking
- Patent number 10,930,327
- Issue date Feb 23, 2021
- Micron Technology, Inc.
- Dave Jefferson
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for multi-bank refresh timing
- Patent number 10,923,172
- Issue date Feb 16, 2021
- Micron Technology, Inc.
- Jason M. Johnson
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for multi-bank refresh timing
- Patent number 10,593,392
- Issue date Mar 17, 2020
- Micron Technology, Inc.
- Jason M. Johnson
- G11 - INFORMATION STORAGE
Information Patent Grant
Row addressing
- Patent number 8,223,583
- Issue date Jul 17, 2012
- Micron Technology, Inc.
- Takuya Nakanishi
- G11 - INFORMATION STORAGE
Information Patent Grant
Row addressing
- Patent number 7,933,162
- Issue date Apr 26, 2011
- Micron Technology, Inc.
- Takuya Nakanishi
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
TEMPERATURE-BASED ERROR MASKING DURING MBIST OPERATION
- Publication number 20240127901
- Publication date Apr 18, 2024
- Micron Technology, Inc.
- Daniel S. Miller
- G11 - INFORMATION STORAGE
Information Patent Application
TEST MODE SECURITY CIRCUIT
- Publication number 20240087625
- Publication date Mar 14, 2024
- Micron Technology, Inc.
- Kari Crane
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS FOR TESTING REDUNDANT FUSE LATCHES IN A MEMORY...
- Publication number 20240071560
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS WITH ADJUSTABLE DIAGNOSTIC MECHANISM AND METHODS FOR OPER...
- Publication number 20240021262
- Publication date Jan 18, 2024
- Micron Technology, Inc.
- Takuya Tamano
- G11 - INFORMATION STORAGE
Information Patent Application
ASYNCHRONOUS SIGNAL TO COMMAND TIMING CALIBRATION FOR TESTING ACCURACY
- Publication number 20230420030
- Publication date Dec 28, 2023
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Application
SELF-REPAIR VERIFICATION
- Publication number 20230360718
- Publication date Nov 9, 2023
- Micron Technology, Inc.
- Takuya Tamano
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS INCLUDING DICE LATCHES IN A SEMICONDUCTOR D...
- Publication number 20230343376
- Publication date Oct 26, 2023
- Micron Technology, Inc.
- Yoshiro Riho
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR DYNAMIC COLUMN SELECT SWAPPING
- Publication number 20230290428
- Publication date Sep 14, 2023
- Micron Technology, Inc.
- YOSHINORI FUJIWARA
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS INCLUDING DICE LATCHES IN A SEMICONDUCTOR D...
- Publication number 20230223059
- Publication date Jul 13, 2023
- Micron Technology, Inc.
- Yoshiro Riho
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR BAD ROW MODE
- Publication number 20230096291
- Publication date Mar 30, 2023
- Micron Technology, Inc.
- Jack Riley
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY BUILT-IN SELF-TEST WITH ADJUSTABLE PAUSE TIME
- Publication number 20230069351
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR REFRESH ADDRESS MASKING
- Publication number 20230020753
- Publication date Jan 19, 2023
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS FOR POWER SAVINGS IN ROW REPAIRED MEMORY
- Publication number 20220366998
- Publication date Nov 17, 2022
- Micron Technology , Inc.
- James S. Rehmeyer
- G11 - INFORMATION STORAGE
Information Patent Application
Repair Element Availability Communication
- Publication number 20220357856
- Publication date Nov 10, 2022
- Micron Technology, Inc.
- Loren Jeffrey Wooley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR ERROR CORRECTION
- Publication number 20220156148
- Publication date May 19, 2022
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR POWER SAVINGS IN ROW REPAIRED MEMORY
- Publication number 20220139489
- Publication date May 5, 2022
- Micron Technology, Inc.
- James S. Rehmeyer
- G11 - INFORMATION STORAGE
Information Patent Application
IDENTIFYING HIGH IMPEDANCE FAULTS IN A MEMORY DEVICE
- Publication number 20210335410
- Publication date Oct 28, 2021
- Micron Technology, Inc.
- Daniel S. Miller
- G11 - INFORMATION STORAGE
Information Patent Application
INTERCONNECTED COMMAND/ADDRESS RESOURCES
- Publication number 20210304838
- Publication date Sep 30, 2021
- Micron Technology, Inc.
- Jason M. Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR SELF-TEST MODE ABORT CIRCUIT
- Publication number 20210304835
- Publication date Sep 30, 2021
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR ERROR CORRECTION
- Publication number 20210200629
- Publication date Jul 1, 2021
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUSES TO DETECT TEST PROBE CONTACT AT EXTERNAL TE...
- Publication number 20210063487
- Publication date Mar 4, 2021
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR FUSE ERROR DETECTION
- Publication number 20210055981
- Publication date Feb 25, 2021
- Micron Technology, Inc.
- Daniel S. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR MULTI-BANK REFRESH TIMING
- Publication number 20200211635
- Publication date Jul 2, 2020
- Micron Technology, Inc.
- Jason M. Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
ROW ADDRESSING
- Publication number 20110170365
- Publication date Jul 14, 2011
- Micron Technology, Inc.
- Takuya Nakanishi
- G11 - INFORMATION STORAGE

Yoshinori Fujiwara

Person

Patents Grantslast 30 patents

Test mode security circuit

Systems and methods for testing redundant fuse latches in a memory...

Repair element availability communication

Asynchronous signal to command timing calibration for testing accuracy

Apparatuses and methods for bad row mode

Self-repair verification

Systems and methods for power savings in row repaired memory

Memory built-in self-test with adjustable pause time

Apparatuses and methods including dice latches in a semiconductor d...

Apparatuses and methods for self-test mode abort circuit

Apparatuses and methods for refresh address masking

Apparatuses and methods for fuse error detection

Systems and methods for power savings in row repaired memory

Microelectronic device testing, and related devices, systems, and m...

Interconnected command/address resources

Apparatuses, systems, and methods for error correction

Transmit line monitoring circuitry, and related methods, devices, a...

Identifying high impedance faults in a memory device

Memory device random option inversion

Methods and apparatuses to detect test probe contact at external te...

Memory read masking

Apparatuses and methods for multi-bank refresh timing

Apparatuses and methods for multi-bank refresh timing

Row addressing

Row addressing

Patents Applicationslast 30 patents

TEMPERATURE-BASED ERROR MASKING DURING MBIST OPERATION

TEST MODE SECURITY CIRCUIT

SYSTEMS AND METHODS FOR TESTING REDUNDANT FUSE LATCHES IN A MEMORY...

APPARATUS WITH ADJUSTABLE DIAGNOSTIC MECHANISM AND METHODS FOR OPER...

ASYNCHRONOUS SIGNAL TO COMMAND TIMING CALIBRATION FOR TESTING ACCURACY

SELF-REPAIR VERIFICATION

APPARATUSES AND METHODS INCLUDING DICE LATCHES IN A SEMICONDUCTOR D...

APPARATUSES AND METHODS FOR DYNAMIC COLUMN SELECT SWAPPING

APPARATUSES AND METHODS INCLUDING DICE LATCHES IN A SEMICONDUCTOR D...

APPARATUSES AND METHODS FOR BAD ROW MODE

MEMORY BUILT-IN SELF-TEST WITH ADJUSTABLE PAUSE TIME

APPARATUSES AND METHODS FOR REFRESH ADDRESS MASKING

SYSTEMS AND METHODS FOR POWER SAVINGS IN ROW REPAIRED MEMORY

Repair Element Availability Communication

APPARATUSES, SYSTEMS, AND METHODS FOR ERROR CORRECTION

SYSTEMS AND METHODS FOR POWER SAVINGS IN ROW REPAIRED MEMORY

IDENTIFYING HIGH IMPEDANCE FAULTS IN A MEMORY DEVICE

INTERCONNECTED COMMAND/ADDRESS RESOURCES

APPARATUSES AND METHODS FOR SELF-TEST MODE ABORT CIRCUIT

APPARATUSES, SYSTEMS, AND METHODS FOR ERROR CORRECTION

METHODS AND APPARATUSES TO DETECT TEST PROBE CONTACT AT EXTERNAL TE...

APPARATUSES AND METHODS FOR FUSE ERROR DETECTION

APPARATUSES AND METHODS FOR MULTI-BANK REFRESH TIMING

ROW ADDRESSING