Youngcheol Kim

Person

Kyoung-do, KR

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device and method of making double shielding layers o...
- Patent number 12,362,287
- Issue date Jul 15, 2025
- STATS ChipPAC Pte. Ltd.
- ChangOh Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of making a photonic semiconductor...
- Patent number 12,218,114
- Issue date Feb 4, 2025
- STATS ChipPAC Pte. Ltd.
- KyungOe Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming hybrid TIM layers
- Patent number 12,125,764
- Issue date Oct 22, 2024
- STATS ChipPAC Pte. Ltd.
- TaeKeun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of integrating RF antenna interpose...
- Patent number 12,100,663
- Issue date Sep 24, 2024
- STATS ChipPAC Pte. Ltd.
- NamJu Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of compartment shielding using bond...
- Patent number 12,009,314
- Issue date Jun 11, 2024
- STATS ChipPAC Pte. Ltd.
- YoungCheol Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming hybrid TIM layers
- Patent number 11,735,489
- Issue date Aug 22, 2023
- STATS ChipPAC Pte. Ltd.
- TaeKeun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of integrating RF antenna interpose...
- Patent number 11,735,530
- Issue date Aug 22, 2023
- STATS ChipPAC Pte. Ltd.
- NamJu Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of compartment shielding using bond...
- Patent number 11,450,618
- Issue date Sep 20, 2022
- STATS ChipPAC Pte. Ltd.
- YoungCheol Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Filp chip interconnection structure with bump on partial pad and me...
- Patent number 9,125,332
- Issue date Sep 1, 2015
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Integrated circuit package system with mold gate
- Patent number 8,841,782
- Issue date Sep 23, 2014
- Stats Chippac Ltd.
- DaeWook Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with reinforced encapsulant hav...
- Patent number 8,604,602
- Issue date Dec 10, 2013
- Stats Chippac Ltd.
- Seng Guan Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin package system with external terminals and method of manufactu...
- Patent number 8,481,371
- Issue date Jul 9, 2013
- Stats Chippac Ltd.
- Youngcheol Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Inter-stacking module system
- Patent number 8,410,594
- Issue date Apr 2, 2013
- Stats Chippac Ltd.
- Kwang Soon Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked integrated circuit and package system and method for manufa...
- Patent number 8,102,043
- Issue date Jan 24, 2012
- Stats Chippac Ltd.
- Tae Sung Jeong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin package system with external terminals
- Patent number 7,947,535
- Issue date May 24, 2011
- Stats Chippac Ltd.
- Youngcheol Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked integrated circuit and package system
- Patent number 7,875,966
- Issue date Jan 25, 2011
- Stats Chippac Ltd.
- Tae Sung Jeong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making semiconductor multipackage module including die a...
- Patent number 7,829,382
- Issue date Nov 9, 2010
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flip chip interconnection structure with bump on partial pad and me...
- Patent number 7,759,137
- Issue date Jul 20, 2010
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Semiconductor multipackage module including die and inverted land g...
- Patent number 7,692,279
- Issue date Apr 6, 2010
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor multipackage module including die and inverted land g...
- Patent number 7,253,511
- Issue date Aug 7, 2007
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor Device and Method of Forming Underfill Dam for Chip-t...
- Publication number 20240021566
- Publication date Jan 18, 2024
- STATS ChipPAC Pte Ltd.
- WooSoon Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Double Shielding
- Publication number 20230420382
- Publication date Dec 28, 2023
- STATS ChipPAC Pte Ltd.
- ChangOh Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Hybrid TIM Layers
- Publication number 20230352359
- Publication date Nov 2, 2023
- STATS ChipPAC Pte Ltd.
- TaeKeun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Integrating RF Antenna Interpose...
- Publication number 20230343720
- Publication date Oct 26, 2023
- STATS ChipPAC Pte Ltd.
- NamJu Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Making a Photonic Semiconductor...
- Publication number 20230125546
- Publication date Apr 27, 2023
- STATS ChipPAC Pte Ltd.
- KyungOe Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Integrating RF Antenna Interpose...
- Publication number 20230067475
- Publication date Mar 2, 2023
- STATS ChipPAC Pte Ltd.
- NamJu Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Hybrid TIM Layers
- Publication number 20220406675
- Publication date Dec 22, 2022
- STATS ChipPAC Pte Ltd.
- TaeKeun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Compartment Shielding Using Bond...
- Publication number 20220384361
- Publication date Dec 1, 2022
- STATS ChipPAC Pte Ltd.
- YoungCheol Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Compartment Shielding Using Bond...
- Publication number 20210225778
- Publication date Jul 22, 2021
- STATS ChipPAC Pte Ltd.
- YoungCheol Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THIN PACKAGE SYSTEM WITH EXTERNAL TERMINALS AND METHOD OF MANUFACTU...
- Publication number 20110215456
- Publication date Sep 8, 2011
- Youngcheol Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED INTEGRATED CIRCUIT AND PACKAGE SYSTEM AND METHOD FOR MANUFA...
- Publication number 20110108976
- Publication date May 12, 2011
- Tae Sung Jeong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH REINFORCED ENCAPSULANT HAV...
- Publication number 20100289134
- Publication date Nov 18, 2010
- Seng Guan Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Filp Chip Interconnection Structure with Bump on Partial Pad and Me...
- Publication number 20100244245
- Publication date Sep 30, 2010
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
METHOD FOR MAKING SEMICONDUCTOR MULTIPACKAGE MODULE INCLUDING DIE A...
- Publication number 20100136744
- Publication date Jun 3, 2010
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOLD GATE
- Publication number 20100038804
- Publication date Feb 18, 2010
- DaeWook Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Flip Chip Interconnection Structure with Bump on Partial Pad and Me...
- Publication number 20090243080
- Publication date Oct 1, 2009
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Semiconductor multipackage module including die and inverted land g...
- Publication number 20070278658
- Publication date Dec 6, 2007
- STATS ChipPAC Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPACERLESS SEMICONDUCTOR PACKAGE CHIP STACKING SYSTEM
- Publication number 20070268660
- Publication date Nov 22, 2007
- STATS ChipPAC Ltd.
- Seungyun Ahn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Inter-stacking module system
- Publication number 20070158858
- Publication date Jul 12, 2007
- STATS ChipPAC Ltd.
- Kwang Soon Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked integrated circuit and package system
- Publication number 20060180911
- Publication date Aug 17, 2006
- STATS ChipPAC Ltd.
- Tae Sung Jeong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor multipackage module including die and inverted land g...
- Publication number 20060012018
- Publication date Jan 19, 2006
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS

Youngcheol Kim

Person

Patents Grantslast 30 patents

Semiconductor device and method of making double shielding layers o...

Semiconductor device and method of making a photonic semiconductor...

Semiconductor device and method of forming hybrid TIM layers

Semiconductor device and method of integrating RF antenna interpose...

Semiconductor device and method of compartment shielding using bond...

Semiconductor device and method of forming hybrid TIM layers

Semiconductor device and method of integrating RF antenna interpose...

Semiconductor device and method of compartment shielding using bond...

Filp chip interconnection structure with bump on partial pad and me...

Integrated circuit package system with mold gate

Integrated circuit packaging system with reinforced encapsulant hav...

Thin package system with external terminals and method of manufactu...

Inter-stacking module system

Stacked integrated circuit and package system and method for manufa...

Thin package system with external terminals

Stacked integrated circuit and package system

Method for making semiconductor multipackage module including die a...

Flip chip interconnection structure with bump on partial pad and me...

Semiconductor multipackage module including die and inverted land g...

Semiconductor multipackage module including die and inverted land g...

Patents Applicationslast 30 patents

Semiconductor Device and Method of Forming Underfill Dam for Chip-t...

Semiconductor Device and Method of Double Shielding

Semiconductor Device and Method of Forming Hybrid TIM Layers

Semiconductor Device and Method of Integrating RF Antenna Interpose...

Semiconductor Device and Method of Making a Photonic Semiconductor...

Semiconductor Device and Method of Integrating RF Antenna Interpose...

Semiconductor Device and Method of Forming Hybrid TIM Layers

Semiconductor Device and Method of Compartment Shielding Using Bond...

Semiconductor Device and Method of Compartment Shielding Using Bond...

THIN PACKAGE SYSTEM WITH EXTERNAL TERMINALS AND METHOD OF MANUFACTU...

STACKED INTEGRATED CIRCUIT AND PACKAGE SYSTEM AND METHOD FOR MANUFA...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH REINFORCED ENCAPSULANT HAV...

Filp Chip Interconnection Structure with Bump on Partial Pad and Me...

METHOD FOR MAKING SEMICONDUCTOR MULTIPACKAGE MODULE INCLUDING DIE A...

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOLD GATE

Flip Chip Interconnection Structure with Bump on Partial Pad and Me...

Semiconductor multipackage module including die and inverted land g...

SPACERLESS SEMICONDUCTOR PACKAGE CHIP STACKING SYSTEM

Inter-stacking module system

Stacked integrated circuit and package system

Semiconductor multipackage module including die and inverted land g...