Youngtag Woo

Person

San Ramon, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Gate contact structures and cross-coupled contact structures for tr...
- Patent number 12,002,869
- Issue date Jun 4, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate contact structures and cross-coupled contact structures for tr...
- Patent number 11,469,309
- Issue date Oct 11, 2022
- GLOBALFOUNDRIES U.S. INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor with recessed cross couple for gate contact over active...
- Patent number 10,770,388
- Issue date Sep 8, 2020
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate structure for a transistor device with a novel pillar structur...
- Patent number 10,714,591
- Issue date Jul 14, 2020
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming gate contact structures and cross-coupled contac...
- Patent number 10,651,284
- Issue date May 12, 2020
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned gate cut method and multilayer gate-cut pillar structure
- Patent number 10,629,701
- Issue date Apr 21, 2020
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate contact structures and cross-coupled contact structures for tr...
- Patent number 10,490,455
- Issue date Nov 26, 2019
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming gate contact structures and cross-coupled contac...
- Patent number 10,236,215
- Issue date Mar 19, 2019
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure with local contact for shorting a gate electrode to a sou...
- Patent number 10,204,861
- Issue date Feb 12, 2019
- GLOBALFOUNDRIES Inc.
- Xuelian Zhu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Active contact and gate contact interconnect for mitigating adjacen...
- Patent number 10,109,636
- Issue date Oct 23, 2018
- GLOBALFOUNDRIES Inc.
- Youngtag Woo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical channel transistor-based semiconductor memory structure
- Patent number 9,711,511
- Issue date Jul 18, 2017
- GLOBALFOUNDRIES Inc.
- Kwan-Yong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to form merged spacers for use in fin generation in IC devices
- Patent number 9,627,389
- Issue date Apr 18, 2017
- GLOBALFOUNDRIES Inc.
- Youngtag Woo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to utilize merged spacers for use in fin generation in tape...
- Patent number 9,472,464
- Issue date Oct 18, 2016
- GLOBALFOUNDRIES Inc.
- Jia Zeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal segments as landing pads and local interconnects in an IC device
- Patent number 9,466,604
- Issue date Oct 11, 2016
- GLOBALFOUNDRIES Inc.
- Youngtag Woo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned double patterning process for two dimensional patterns
- Patent number 9,437,481
- Issue date Sep 6, 2016
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for creating self-aligned compact contacts in an IC device m...
- Patent number 9,406,775
- Issue date Aug 2, 2016
- GLOBALFOUNDRIES Inc.
- Guillaume Bouche
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Merged source/drain and gate contacts in SRAM bitcell
- Patent number 9,406,616
- Issue date Aug 2, 2016
- GLOBALFOUNDRIES Inc.
- Youngtag Woo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Utilization of block-mask and cut-mask for forming metal routing in...
- Patent number 9,324,722
- Issue date Apr 26, 2016
- GLOBALFOUNDRIES Inc.
- Youngtag Woo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for increasing the robustness of a double patterning router...
- Patent number 9,268,897
- Issue date Feb 23, 2016
- GLOBALFOUNDRIES, INC.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of forming FinFET devices in different regions of an integr...
- Patent number 9,184,169
- Issue date Nov 10, 2015
- GLOBALFOUNDRIES Inc.
- Ryan Ryoung-Han Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Double sidewall image transfer process
- Patent number 9,105,510
- Issue date Aug 11, 2015
- GLOBALFOUNDRIES Inc.
- Youngtag Woo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnection designs using sidewall image transfer (SIT)
- Patent number 8,962,483
- Issue date Feb 24, 2015
- GLOBALFOUNDRIES Inc.
- Youngtag Woo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Double sidewall image transfer process
- Patent number 8,889,561
- Issue date Nov 18, 2014
- GLOBALFOUNDRIES Inc.
- Youngtag Woo
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
GATE CONTACT STRUCTURES AND CROSS-COUPLED CONTACT STRUCTURES FOR TR...
- Publication number 20220416054
- Publication date Dec 29, 2022
- GLOBALFOUNDRIES U.S. Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE CONTACT STRUCTURES AND CROSS-COUPLED CONTACT STRUCTURES FOR TR...
- Publication number 20200203497
- Publication date Jun 25, 2020
- GLOBALFOUNDRIES INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NOVEL GATE STRUCTURE FOR A TRANSISTOR DEVICE WITH A NOVEL PILLAR ST...
- Publication number 20200176587
- Publication date Jun 4, 2020
- GLOBALFOUNDRIES INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED GATE CUT METHOD AND MULTILAYER GATE-CUT PILLAR STRUCTURE
- Publication number 20200119163
- Publication date Apr 16, 2020
- GLOBALFOUNDRIES INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR WITH RECESSED CROSS COUPLE FOR GATE CONTACT OVER ACTIVE...
- Publication number 20190385946
- Publication date Dec 19, 2019
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE CONTACT STRUCTURES AND CROSS-COUPLED CONTACT STRUCTURES FOR TR...
- Publication number 20190148240
- Publication date May 16, 2019
- GLOBALFOUNDRIES INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING GATE CONTACT STRUCTURES AND CROSS-COUPLED CONTAC...
- Publication number 20190123162
- Publication date Apr 25, 2019
- GLOBALFOUNDRIES INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ACTIVE CONTACT AND GATE CONTACT INTERCONNECT FOR MITIGATING ADJACEN...
- Publication number 20180261604
- Publication date Sep 13, 2018
- GLOBALFOUNDRIES INC.
- Youngtag Woo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACTS FOR LOCAL CONNECTIONS
- Publication number 20180190588
- Publication date Jul 5, 2018
- GLOBALFOUNDRIES INC.
- Xuelian ZHU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL CHANNEL TRANSISTOR-BASED SEMICONDUCTOR STRUCTURE
- Publication number 20170373071
- Publication date Dec 28, 2017
- GLOBALFOUNDRIES INC.
- Kwan-Yong LIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED DOUBLE PATTERNING PROCESS FOR TWO DIMENSIONAL PATTERNS
- Publication number 20160163584
- Publication date Jun 9, 2016
- GLOBALFOUNDRIES INC.
- Lei Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MERGED SOURCE/DRAIN AND GATE CONTACTS IN SRAM BITCELL
- Publication number 20160163644
- Publication date Jun 9, 2016
- GLOBALFOUNDRIES INC.
- Youngtag WOO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL SEGMENTS AS LANDING PADS AND LOCAL INTERCONNECTS IN AN IC DEVICE
- Publication number 20160141291
- Publication date May 19, 2016
- GLOBALFOUNDRIES INC.
- Youngtag WOO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING FINFET DEVICES IN DIFFERENT REGIONS OF AN INTEGR...
- Publication number 20150294976
- Publication date Oct 15, 2015
- GLOBALFOUNDIES INC.
- Ryan Ryoung-Han Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DOUBLE SIDEWALL IMAGE TRANSFER PROCESS
- Publication number 20140353765
- Publication date Dec 4, 2014
- Youngtag WOO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTION DESIGNS USING SIDEWALL IMAGE TRANSFER (SIT)
- Publication number 20140273474
- Publication date Sep 18, 2014
- GLOBALFOUNDRIES INC.
- Youngtag WOO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DOUBLE SIDEWALL IMAGE TRANSFER PROCESS
- Publication number 20140159164
- Publication date Jun 12, 2014
- GLOBALFOUNDRIES Inc.
- Youngtag WOO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR INCREASING THE ROBUSTNESS OF A DOUBLE PATTERNING ROUTER...
- Publication number 20130298089
- Publication date Nov 7, 2013
- GLOBALFOUNDRIES INC.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING

Youngtag Woo

Person

Patents Grantslast 30 patents

Gate contact structures and cross-coupled contact structures for tr...

Gate contact structures and cross-coupled contact structures for tr...

Transistor with recessed cross couple for gate contact over active...

Gate structure for a transistor device with a novel pillar structur...

Methods of forming gate contact structures and cross-coupled contac...

Self-aligned gate cut method and multilayer gate-cut pillar structure

Gate contact structures and cross-coupled contact structures for tr...

Methods of forming gate contact structures and cross-coupled contac...

Structure with local contact for shorting a gate electrode to a sou...

Active contact and gate contact interconnect for mitigating adjacen...

Vertical channel transistor-based semiconductor memory structure

Methods to form merged spacers for use in fin generation in IC devices

Methods to utilize merged spacers for use in fin generation in tape...

Metal segments as landing pads and local interconnects in an IC device

Self-aligned double patterning process for two dimensional patterns

Method for creating self-aligned compact contacts in an IC device m...

Merged source/drain and gate contacts in SRAM bitcell

Utilization of block-mask and cut-mask for forming metal routing in...

Method for increasing the robustness of a double patterning router...

Methods of forming FinFET devices in different regions of an integr...

Double sidewall image transfer process

Interconnection designs using sidewall image transfer (SIT)

Double sidewall image transfer process

Patents Applicationslast 30 patents

GATE CONTACT STRUCTURES AND CROSS-COUPLED CONTACT STRUCTURES FOR TR...

GATE CONTACT STRUCTURES AND CROSS-COUPLED CONTACT STRUCTURES FOR TR...

NOVEL GATE STRUCTURE FOR A TRANSISTOR DEVICE WITH A NOVEL PILLAR ST...

SELF-ALIGNED GATE CUT METHOD AND MULTILAYER GATE-CUT PILLAR STRUCTURE

TRANSISTOR WITH RECESSED CROSS COUPLE FOR GATE CONTACT OVER ACTIVE...

GATE CONTACT STRUCTURES AND CROSS-COUPLED CONTACT STRUCTURES FOR TR...

METHODS OF FORMING GATE CONTACT STRUCTURES AND CROSS-COUPLED CONTAC...

ACTIVE CONTACT AND GATE CONTACT INTERCONNECT FOR MITIGATING ADJACEN...

CONTACTS FOR LOCAL CONNECTIONS

VERTICAL CHANNEL TRANSISTOR-BASED SEMICONDUCTOR STRUCTURE

SELF-ALIGNED DOUBLE PATTERNING PROCESS FOR TWO DIMENSIONAL PATTERNS

MERGED SOURCE/DRAIN AND GATE CONTACTS IN SRAM BITCELL

METAL SEGMENTS AS LANDING PADS AND LOCAL INTERCONNECTS IN AN IC DEVICE

METHODS OF FORMING FINFET DEVICES IN DIFFERENT REGIONS OF AN INTEGR...

DOUBLE SIDEWALL IMAGE TRANSFER PROCESS

INTERCONNECTION DESIGNS USING SIDEWALL IMAGE TRANSFER (SIT)

DOUBLE SIDEWALL IMAGE TRANSFER PROCESS

METHOD FOR INCREASING THE ROBUSTNESS OF A DOUBLE PATTERNING ROUTER...