Yu Bai

Person

Shrewsbury, MA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Simulated-annealing based memory allocations
- Patent number 11,249,683
- Issue date Feb 15, 2022
- Intel Corporation
- Yu Bai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses, methods, and systems for memory interface circuit allo...
- Patent number 10,915,471
- Issue date Feb 9, 2021
- Intel Corporation
- Kermin ChoFleming
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for selecting an operating frequency of a cent...
- Patent number 9,355,001
- Issue date May 31, 2016
- Marvell International Ltd.
- Qinwei Gu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Audio codec with audio buffer to store decoded audio data wherein d...
- Patent number 9,195,295
- Issue date Nov 24, 2015
- Marvell International Ltd.
- Qinwei Gu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for selecting a power management configuration in...
- Patent number 8,930,728
- Issue date Jan 6, 2015
- Marvell International Ltd.
- Yu Bai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power audio codec
- Patent number 8,738,824
- Issue date May 27, 2014
- Marvell International Ltd.
- Qinwei Gu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Millions of instruction per second (MIPS) based idle profiler in a...
- Patent number 8,732,488
- Issue date May 20, 2014
- Marvell International Ltd.
- Qinwei Gu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for selecting a power management configuration in...
- Patent number 8,689,021
- Issue date Apr 1, 2014
- Marvell International Ltd.
- Yu Bai
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method and system for selecting an operating frequency for a chip t...
- Patent number 8,578,188
- Issue date Nov 5, 2013
- Marvell International Ltd.
- Yu Bai
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method and system for selecting an operating frequency for a chip t...
- Patent number 8,281,160
- Issue date Oct 2, 2012
- Marvell International Ltd.
- Yu Bai
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS TO REDUCE LATENCY OF A MEMORY-SIDE CACHE
- Publication number 20230409478
- Publication date Dec 21, 2023
- Intel Corporation
- Kermin CHOFLEMING
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-STAGE CACHE TAG WITH FIRST STAGE TAG SIZE REDUCTION
- Publication number 20220405209
- Publication date Dec 22, 2022
- Intel Corporation
- Kermin ChoFleming
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TAG SIZE REDUCTION USING MULTIPLE HASH FUNCTIONS
- Publication number 20220283948
- Publication date Sep 8, 2022
- Intel Corporation
- Kermin Chofleming
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES, METHODS, AND SYSTEMS FOR MEMORY INTERFACE CIRCUIT ALLO...
- Publication number 20200310994
- Publication date Oct 1, 2020
- Intel Corporation
- Kermin ChoFleming
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIMULATED-ANNEALING BASED MEMORY ALLOCATIONS
- Publication number 20200210113
- Publication date Jul 2, 2020
- Intel Corporation
- Yu Bai
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Simulated-annealing based memory allocations

Apparatuses, methods, and systems for memory interface circuit allo...

Method and apparatus for selecting an operating frequency of a cent...

Audio codec with audio buffer to store decoded audio data wherein d...

System and method for selecting a power management configuration in...

Low power audio codec

Millions of instruction per second (MIPS) based idle profiler in a...

System and method for selecting a power management configuration in...

Method and system for selecting an operating frequency for a chip t...

Method and system for selecting an operating frequency for a chip t...

Patents Applicationslast 30 patents

METHOD AND APPARATUS TO REDUCE LATENCY OF A MEMORY-SIDE CACHE

MULTI-STAGE CACHE TAG WITH FIRST STAGE TAG SIZE REDUCTION

TAG SIZE REDUCTION USING MULTIPLE HASH FUNCTIONS

APPARATUSES, METHODS, AND SYSTEMS FOR MEMORY INTERFACE CIRCUIT ALLO...

SIMULATED-ANNEALING BASED MEMORY ALLOCATIONS