Yu-Chung Lien

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Independent sensing times
- Patent number 12,211,556
- Issue date Jan 28, 2025
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive bitline voltage for memory operations
- Patent number 12,197,739
- Issue date Jan 14, 2025
- Micron Technology, Inc.
- Yu-Chung Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Charge loss mitigation through dynamic programming sequence
- Patent number 12,189,961
- Issue date Jan 7, 2025
- Micron Technology, Inc.
- Yu-Chung Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3D NAND memory with built-in capacitor
- Patent number 12,170,117
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory programming techniques to reduce power consumption
- Patent number 12,154,635
- Issue date Nov 26, 2024
- SanDdisk Technologies LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
3D NAND memory with fast corrective read
- Patent number 12,148,480
- Issue date Nov 19, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive programming delay scheme in a memory sub-system
- Patent number 12,142,326
- Issue date Nov 12, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Detecting a memory write reliability risk without using a write ver...
- Patent number 12,106,812
- Issue date Oct 1, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Proximity based parity data management
- Patent number 12,079,079
- Issue date Sep 3, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive error avoidance in the memory devices
- Patent number 12,073,905
- Issue date Aug 27, 2024
- Micron Technology, Inc.
- Li-Te Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Error detection for programming single level cells
- Patent number 12,067,255
- Issue date Aug 20, 2024
- Micron Technology, Inc.
- Tomer Tzvi Eliash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power mode with read sequence adjustment
- Patent number 12,057,157
- Issue date Aug 6, 2024
- SanDisk Techn ologies LLC
- Jiahui Yuan
- G11 - INFORMATION STORAGE
Information Patent Grant
Padding in flash memory blocks
- Patent number 12,057,167
- Issue date Aug 6, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming delay scheme for a memory sub-system based on memory re...
- Patent number 12,027,210
- Issue date Jul 2, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive sensing time for memory operations
- Patent number 12,014,049
- Issue date Jun 18, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Program voltage dependent program source levels
- Patent number 11,972,801
- Issue date Apr 30, 2024
- SanDisk Technologies, LLC
- Xue Pitner
- G11 - INFORMATION STORAGE
Information Patent Grant
Word line zone dependent pre-charge voltage
- Patent number 11,972,803
- Issue date Apr 30, 2024
- SanDisk Technologies, LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Selective inhibit bitline voltage to cells with worse program disturb
- Patent number 11,972,809
- Issue date Apr 30, 2024
- SanDisk Technologies, LLC
- Sujjatul Islam
- G11 - INFORMATION STORAGE
Information Patent Grant
Verify techniques for current reduction in a memory device
- Patent number 11,972,814
- Issue date Apr 30, 2024
- SanDisk Technologies, LLC
- Xue Bai Pitner
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory read operation using a voltage pattern based on a read comma...
- Patent number 11,972,122
- Issue date Apr 30, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
EP cycling dependent asymmetric/symmetric VPASS conversion in non-v...
- Patent number 11,894,081
- Issue date Feb 6, 2024
- SanDisk Technologies LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Controlling bit line pre-charge voltage separately for multi-level...
- Patent number 11,887,670
- Issue date Jan 30, 2024
- SanDisk Technologies LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for staggering read operation of sub-blocks
- Patent number 11,875,842
- Issue date Jan 16, 2024
- SanDisk Technologies LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory with adjusted bit line voltage during verify
- Patent number 11,837,296
- Issue date Dec 5, 2023
- SanDisk Technologies LLC
- Yu-Chung Lien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
State dependent VPVD voltages for more uniform threshold voltage di...
- Patent number 11,790,992
- Issue date Oct 17, 2023
- SanDisk Technologies LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Three dimensional memory device containing truncated channels and m...
- Patent number 11,758,718
- Issue date Sep 12, 2023
- SanDisk Technologies LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Peak and average ICC reduction by tier-based sensing during program...
- Patent number 11,699,494
- Issue date Jul 11, 2023
- SanDisk Technologies LLC
- Xue Bai Pitner
- G11 - INFORMATION STORAGE
Information Patent Grant
Sub-block programming mode with multi-tier block
- Patent number 11,664,075
- Issue date May 30, 2023
- SanDisk Technologies LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Efficient read of NAND with read disturb mitigation
- Patent number 11,600,343
- Issue date Mar 7, 2023
- SanDisk Technologies LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Block configuration for memory device with separate sub-blocks
- Patent number 11,587,619
- Issue date Feb 21, 2023
- SanDisk Technologies LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
3D NAND MEMORY WITH FAST CORRECTIVE READ
- Publication number 20250037774
- Publication date Jan 30, 2025
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
CORRECTIVE READ ON PARTIALLY PROGRAMMED BLOCKS
- Publication number 20250029663
- Publication date Jan 23, 2025
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
ADAPTIVE PROGRAMMING DELAY SCHEME IN A MEMORY SUB-SYSTEM
- Publication number 20250029665
- Publication date Jan 23, 2025
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
SELECTION OF AN OPTIMAL SINGLE LEVEL CELL PROGRAMMING SCHEME
- Publication number 20250022515
- Publication date Jan 16, 2025
- Micron Technology, Inc.
- Yu-Chung LIEN
- G11 - INFORMATION STORAGE
Information Patent Application
SELECTIVE USE OF A WORD LINE MONITORING PROCEDURE FOR RELIABILITY-R...
- Publication number 20250014657
- Publication date Jan 9, 2025
- Micron Technology, Inc.
- Yu-Chung LIEN
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGING ALLOCATION OF BLOCKS ACROSS PLANES IN A MEMORY SUB-SYSTEM
- Publication number 20250006270
- Publication date Jan 2, 2025
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGING ALLOCATION OF BLOCKS IN A MEMORY SUB-SYSTEM
- Publication number 20250006269
- Publication date Jan 2, 2025
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
PROXIMITY BASED PARITY DATA MANAGEMENT
- Publication number 20240419543
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETECTING A MEMORY WRITE RELIABILITY RISK WITHOUT USING A WRITE VER...
- Publication number 20240420783
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Yu-Chung LIEN
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGING PROGRAMMING OPERATION SEQUENCE IN A MEMORY SUB-SYSTEM
- Publication number 20240411449
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Yu-Chung LIEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PADDING IN FLASH MEMORY BLOCKS
- Publication number 20240395329
- Publication date Nov 28, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
LEVEL-BASED DATA REFRESH IN A MEMORY SUB-SYSTEM
- Publication number 20240386974
- Publication date Nov 21, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
SELECTION OF ERASE POLICY IN A MEMORY DEVICE
- Publication number 20240370364
- Publication date Nov 7, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE ERROR AVOIDANCE IN THE MEMORY DEVICES
- Publication number 20240363190
- Publication date Oct 31, 2024
- Micron Technology, Inc.
- Li-Te Chang
- G11 - INFORMATION STORAGE
Information Patent Application
MACHINE LEARNING-BASED ADJUSTMENT OF MEMORY CONFIGURATION PARAMETERS
- Publication number 20240330717
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIALLY GOOD BLOCK HANDLING IN A MEMORY DEVICE
- Publication number 20240330094
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HALF GOOD BLOCK HANDLING WITH DEFECTIVE DECK PRE-PROGRAMING IN A ME...
- Publication number 20240331784
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- Hanping Chen
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMING DELAY SCHEME FOR IN A MEMORY SUB-SYSTEM BASED ON MEMORY...
- Publication number 20240304256
- Publication date Sep 12, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
ADAPTIVE SENSING TIME FOR MEMORY OPERATIONS
- Publication number 20240302967
- Publication date Sep 12, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC ERASE OPERATION SELECTION USING ERASE POLICY
- Publication number 20240281145
- Publication date Aug 22, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY READ OPERATION USING A VOLTAGE PATTERN BASED ON A READ COMMA...
- Publication number 20240256155
- Publication date Aug 1, 2024
- Micron Technology, Inc.
- Yu-Chung LIEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELONGATED CAPACITORS IN 3D NAND MEMORY DEVICES
- Publication number 20240249772
- Publication date Jul 25, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC READ RETRY VOLTAGE SEQUENCES IN A MEMORY SUBSYSTEM
- Publication number 20240248619
- Publication date Jul 25, 2024
- Micron Technology, Inc.
- Yu-Chung LIEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING ALLOCATION OF SUB-BLOCKS IN A MEMORY SUB-SYSTEM
- Publication number 20240231641
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Yu-Chung LIEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAM VERIFY LEVEL ADJUSTMENT FOR PROGRAM OPERATION IN A MEMORY D...
- Publication number 20240203503
- Publication date Jun 20, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
SENSING TIME ADJUSTMENT FOR PROGRAM OPERATION IN A MEMORY DEVICE
- Publication number 20240203504
- Publication date Jun 20, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
BITLINE VOLTAGE ADJUSTMENT FOR PROGRAM OPERATION IN A MEMORY DEVICE
- Publication number 20240203502
- Publication date Jun 20, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
PASS VOLTAGE ADJUSTMENT FOR PROGRAM OPERATION IN A MEMORY DEVICE
- Publication number 20240203513
- Publication date Jun 20, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGING ALLOCATION OF BLOCKS IN A MEMORY SUB-SYSTEM
- Publication number 20240203507
- Publication date Jun 20, 2024
- Micron Technology, Inc.
- Tomer Tzvi Eliash
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGING ASYNCHRONOUS POWER LOSS IN A MEMORY DEVICE
- Publication number 20240194279
- Publication date Jun 13, 2024
- Micron Technology, Inc.
- Tomer Tzvi Eliash
- G11 - INFORMATION STORAGE

Yu-Chung Lien

Person

Patents Grantslast 30 patents

Independent sensing times

Adaptive bitline voltage for memory operations

Charge loss mitigation through dynamic programming sequence

3D NAND memory with built-in capacitor

Memory programming techniques to reduce power consumption

3D NAND memory with fast corrective read

Adaptive programming delay scheme in a memory sub-system

Detecting a memory write reliability risk without using a write ver...

Proximity based parity data management

Adaptive error avoidance in the memory devices

Error detection for programming single level cells

Low power mode with read sequence adjustment

Padding in flash memory blocks

Programming delay scheme for a memory sub-system based on memory re...

Adaptive sensing time for memory operations

Program voltage dependent program source levels

Word line zone dependent pre-charge voltage

Selective inhibit bitline voltage to cells with worse program disturb

Verify techniques for current reduction in a memory device

Memory read operation using a voltage pattern based on a read comma...

EP cycling dependent asymmetric/symmetric VPASS conversion in non-v...

Controlling bit line pre-charge voltage separately for multi-level...

Systems and methods for staggering read operation of sub-blocks

Non-volatile memory with adjusted bit line voltage during verify

State dependent VPVD voltages for more uniform threshold voltage di...

Three dimensional memory device containing truncated channels and m...

Peak and average ICC reduction by tier-based sensing during program...

Sub-block programming mode with multi-tier block

Efficient read of NAND with read disturb mitigation

Block configuration for memory device with separate sub-blocks

Patents Applicationslast 30 patents

3D NAND MEMORY WITH FAST CORRECTIVE READ

CORRECTIVE READ ON PARTIALLY PROGRAMMED BLOCKS

ADAPTIVE PROGRAMMING DELAY SCHEME IN A MEMORY SUB-SYSTEM

SELECTION OF AN OPTIMAL SINGLE LEVEL CELL PROGRAMMING SCHEME

SELECTIVE USE OF A WORD LINE MONITORING PROCEDURE FOR RELIABILITY-R...

MANAGING ALLOCATION OF BLOCKS ACROSS PLANES IN A MEMORY SUB-SYSTEM

MANAGING ALLOCATION OF BLOCKS IN A MEMORY SUB-SYSTEM

PROXIMITY BASED PARITY DATA MANAGEMENT

DETECTING A MEMORY WRITE RELIABILITY RISK WITHOUT USING A WRITE VER...

MANAGING PROGRAMMING OPERATION SEQUENCE IN A MEMORY SUB-SYSTEM

PADDING IN FLASH MEMORY BLOCKS

LEVEL-BASED DATA REFRESH IN A MEMORY SUB-SYSTEM

SELECTION OF ERASE POLICY IN A MEMORY DEVICE

ADAPTIVE ERROR AVOIDANCE IN THE MEMORY DEVICES

MACHINE LEARNING-BASED ADJUSTMENT OF MEMORY CONFIGURATION PARAMETERS

PARTIALLY GOOD BLOCK HANDLING IN A MEMORY DEVICE

HALF GOOD BLOCK HANDLING WITH DEFECTIVE DECK PRE-PROGRAMING IN A ME...

PROGRAMMING DELAY SCHEME FOR IN A MEMORY SUB-SYSTEM BASED ON MEMORY...

ADAPTIVE SENSING TIME FOR MEMORY OPERATIONS

DYNAMIC ERASE OPERATION SELECTION USING ERASE POLICY

MEMORY READ OPERATION USING A VOLTAGE PATTERN BASED ON A READ COMMA...

ELONGATED CAPACITORS IN 3D NAND MEMORY DEVICES

DYNAMIC READ RETRY VOLTAGE SEQUENCES IN A MEMORY SUBSYSTEM

MANAGING ALLOCATION OF SUB-BLOCKS IN A MEMORY SUB-SYSTEM

PROGRAM VERIFY LEVEL ADJUSTMENT FOR PROGRAM OPERATION IN A MEMORY D...

SENSING TIME ADJUSTMENT FOR PROGRAM OPERATION IN A MEMORY DEVICE

BITLINE VOLTAGE ADJUSTMENT FOR PROGRAM OPERATION IN A MEMORY DEVICE

PASS VOLTAGE ADJUSTMENT FOR PROGRAM OPERATION IN A MEMORY DEVICE

MANAGING ALLOCATION OF BLOCKS IN A MEMORY SUB-SYSTEM

MANAGING ASYNCHRONOUS POWER LOSS IN A MEMORY DEVICE