Yu DU

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Santa Clara, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Ordering of memory device mapping to reduce contention
- Patent number 10,585,791
- Issue date Mar 10, 2020
- Intel Corporation
- Yu Du
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus, system and method for throttling a rate at which command...
- Patent number 10,521,121
- Issue date Dec 31, 2019
- Intel Corporation
- David B. Carlton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technology to dynamically modulate memory device read granularity
- Patent number 10,372,446
- Issue date Aug 6, 2019
- Intel Corporation
- David J. Pelster
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for specifying read voltage offsets for a read...
- Patent number 10,268,407
- Issue date Apr 23, 2019
- Intel Corporation
- Aliasgar S. Madraswala
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS FOR SPECIFYING READ VOLTAGE OFFSETS FOR A READ...
- Publication number 20190102097
- Publication date Apr 4, 2019
- Intel Corporation
- Aliasgar S. Madraswala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ORDERING OF MEMORY DEVICE MAPPING TO REDUCE CONTENTION
- Publication number 20190042403
- Publication date Feb 7, 2019
- Intel Corporation
- Yu Du
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGY TO DYNAMICALLY MODULATE MEMORY DEVICE READ GRANULARITY
- Publication number 20190004796
- Publication date Jan 3, 2019
- Intel Corporation
- David J. Pelster
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
APPARATUS, SYSTEM AND METHOD FOR THROTTLING A RATE AT WHICH COMMAND...
- Publication number 20180188952
- Publication date Jul 5, 2018
- David B. CARLTON
- G06 - COMPUTING CALCULATING COUNTING