YU-SHIANG LIN

Person

ELMSFORD, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Hybrid ETSOI structure to minimize noise coupling from TSV
- Patent number 10,083,880
- Issue date Sep 25, 2018
- International Business Machines Corporation
- Chung-Hsun Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pulsed-latch based razor with 1-cycle error recovery scheme
- Patent number 9,715,437
- Issue date Jul 25, 2017
- International Business Machines Corporation
- Jae-Joon Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid ETSOI structure to minimize noise coupling from TSV
- Patent number 9,653,615
- Issue date May 16, 2017
- International Business Machines Corporation
- Chung-Hsun Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pulsed-latch based razor with 1-cycle error recovery scheme
- Patent number 9,292,390
- Issue date Mar 22, 2016
- International Business Machines Corporation
- Jae-Joon Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid extremely thin silicon-on-insulator (ETSOI) structure to min...
- Patent number 9,087,909
- Issue date Jul 21, 2015
- International Business Machines Corporation
- Chung-Hsun Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pulsed-latch based razor with 1-cycle error recovery scheme
- Patent number 9,009,545
- Issue date Apr 14, 2015
- International Business Machines Corporation
- Jae-Joon Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
AC supply noise reduction in a 3D stack with voltage sensing and cl...
- Patent number 8,587,357
- Issue date Nov 19, 2013
- International Business Machines Corporation
- Jae-Joon Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3D chip stack skew reduction with resonant clock and inductive coup...
- Patent number 8,576,000
- Issue date Nov 5, 2013
- International Business Machines Corporation
- Jae-Joon Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
3D chip stack skew reduction with resonant clock and inductive coup...
- Patent number 8,466,739
- Issue date Jun 18, 2013
- International Business Machines Corporation
- Jae-Joon Kim
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Hybrid ETSOI Structure to Minimize Noise Coupling from TSV
- Publication number 20170229353
- Publication date Aug 10, 2017
- International Business Machines Corporation
- Chung-Hsun Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PULSED-LATCH BASED RAZOR WITH 1-CYCLE ERROR RECOVERY SCHEME
- Publication number 20160140005
- Publication date May 19, 2016
- International Business Machines Corporation
- Jae-Joon Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PULSED-LATCH BASED RAZOR WITH 1-CYCLE ERROR RECOVERY SCHEME
- Publication number 20140372797
- Publication date Dec 18, 2014
- Jae-Joon Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PULSED-LATCH BASED RAZOR WITH 1-CYCLE ERROR RECOVERY SCHEME
- Publication number 20140372827
- Publication date Dec 18, 2014
- Jae-Joon Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hybrid ETSOI Structure to Minimize Noise Coupling from TSV
- Publication number 20140264605
- Publication date Sep 18, 2014
- International Business Machines Corporation
- Chung-Hsun Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Hybrid ETSOI Structure to Minimize Noise Coupling from TSV
- Publication number 20140264593
- Publication date Sep 18, 2014
- International Business Machines Corporaiton
- Chung-Hsun Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
AC SUPPLY NOISE REDUCTION IN A 3D STACK WITH VOLTAGE SENSING AND CL...
- Publication number 20130049828
- Publication date Feb 28, 2013
- International Business Machines Corporation
- JAE-JOON KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
3D CHIP STACK SKEW REDUCTION WITH RESONANT CLOCK AND INDUCTIVE COUP...
- Publication number 20130049824
- Publication date Feb 28, 2013
- International Business Machines Corporation
- JAE-JOON KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
3D CHIP STACK SKEW REDUCTION WITH RESONANT CLOCK AND INDUCTIVE COUP...
- Publication number 20130049826
- Publication date Feb 28, 2013
- International Business Machines Corporation
- JAE-JOON KIM
- G06 - COMPUTING CALCULATING COUNTING

YU-SHIANG LIN

Person

Patents Grantslast 30 patents

Hybrid ETSOI structure to minimize noise coupling from TSV

Pulsed-latch based razor with 1-cycle error recovery scheme

Hybrid ETSOI structure to minimize noise coupling from TSV

Pulsed-latch based razor with 1-cycle error recovery scheme

Hybrid extremely thin silicon-on-insulator (ETSOI) structure to min...

Pulsed-latch based razor with 1-cycle error recovery scheme

AC supply noise reduction in a 3D stack with voltage sensing and cl...

3D chip stack skew reduction with resonant clock and inductive coup...

3D chip stack skew reduction with resonant clock and inductive coup...

Patents Applicationslast 30 patents

Hybrid ETSOI Structure to Minimize Noise Coupling from TSV

PULSED-LATCH BASED RAZOR WITH 1-CYCLE ERROR RECOVERY SCHEME

PULSED-LATCH BASED RAZOR WITH 1-CYCLE ERROR RECOVERY SCHEME

PULSED-LATCH BASED RAZOR WITH 1-CYCLE ERROR RECOVERY SCHEME

Hybrid ETSOI Structure to Minimize Noise Coupling from TSV

Hybrid ETSOI Structure to Minimize Noise Coupling from TSV

AC SUPPLY NOISE REDUCTION IN A 3D STACK WITH VOLTAGE SENSING AND CL...

3D CHIP STACK SKEW REDUCTION WITH RESONANT CLOCK AND INDUCTIVE COUP...

3D CHIP STACK SKEW REDUCTION WITH RESONANT CLOCK AND INDUCTIVE COUP...