Yu Ying Ong

Person

Indah, MY

People

Patents Grantslast 30 patents

Information Patent Grant
Modular error correction code circuitry
- Patent number 12,094,551
- Issue date Sep 17, 2024
- Intel Corporation
- Hwa Chaw Law
- G11 - INFORMATION STORAGE
Information Patent Grant
Scalable network-on-chip for high-bandwidth memory
- Patent number 11,995,028
- Issue date May 28, 2024
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller system and a method of pre-scheduling memory tran...
- Patent number 11,829,643
- Issue date Nov 28, 2023
- SKYECHIP SDN BHD
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for managing thermal behavior in multichip pa...
- Patent number 11,658,159
- Issue date May 23, 2023
- Intel Corporation
- Saravanan Sethuraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller system and a method for memory scheduling of a st...
- Patent number 11,609,709
- Issue date Mar 21, 2023
- SKYECHIP SDN BHD
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable network-on-chip for high-bandwidth memory
- Patent number 11,580,054
- Issue date Feb 14, 2023
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clocking system and a method of clock synchronization
- Patent number 11,575,383
- Issue date Feb 7, 2023
- SKYECHIP SDN BHD
- Chee Hak Teh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dynamic major mode for efficient memory traffic control
- Patent number 11,188,255
- Issue date Nov 30, 2021
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for managing thermal behavior in multichip pa...
- Patent number 11,164,847
- Issue date Nov 2, 2021
- Intel Corporation
- Saravanan Sethuraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuits with improved memory controllers
- Patent number 9,805,775
- Issue date Oct 31, 2017
- Altera Corporation
- Yu Ying Ong
- G11 - INFORMATION STORAGE
Information Patent Grant
System and methods for adjusting memory command placement
- Patent number 9,733,855
- Issue date Aug 15, 2017
- Altera Corporation
- Yu Ying Ong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory interface with hybrid error detection circuitry for modular...
- Patent number 9,342,402
- Issue date May 17, 2016
- Altera Corporation
- Yu Ying Ong
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for using memory commands
- Patent number 8,977,810
- Issue date Mar 10, 2015
- Altera Corporation
- Gordon Raymond Chiu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
NETWORK-ON-CHIP PACKETIZATION AND ROUTING METHOD AND APPARATUS FOR...
- Publication number 20240297846
- Publication date Sep 5, 2024
- SKYECHIP SDN BHD
- Chee Hak TEH
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Scalable Network-on-Chip for High-Bandwidth Memory
- Publication number 20240296140
- Publication date Sep 5, 2024
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND A SYSTEM FOR NETWORK-ON-CHIP ARBITRATION
- Publication number 20240163223
- Publication date May 16, 2024
- SKYECHIP SDN BHD
- YEONG TAT LIEW
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD OF DEBUGGING NETWORK-ON-CHIP
- Publication number 20240070039
- Publication date Feb 29, 2024
- SKYECHIP SDN BHD
- Yu Ying ONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable Network-on-Chip for High-Bandwidth Memory
- Publication number 20230135934
- Publication date May 4, 2023
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER SYSTEM AND A METHOD OF PRE-SCHEDULING MEMORY TRAN...
- Publication number 20230129791
- Publication date Apr 27, 2023
- SKYECHIP SDN BHD
- Chee Hak TEH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORK-ON-CHIP SYSTEM FOR OPTIMIZING DATA TRANSFER
- Publication number 20230040323
- Publication date Feb 9, 2023
- SKYECHIP SDN BHD
- YU YING ONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER FOR IMPROVING DATA INTEGRITY AND PROVIDING DATA S...
- Publication number 20220253536
- Publication date Aug 11, 2022
- SKYECHIP SDN BHD
- YU YING ONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCKING SYSTEM AND A METHOD OF CLOCK SYNCHRONIZATION
- Publication number 20220200610
- Publication date Jun 23, 2022
- SKYECHIP SDN BHD
- CHEE HAK TEH
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MEMORY CONTROLLER SYSTEM AND A METHOD FOR MEMORY SCHEDULING OF A ST...
- Publication number 20220100423
- Publication date Mar 31, 2022
- SKYECHIP SDN BHD
- CHEE HAK TEH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR MANAGING THERMAL BEHAVIOR IN MULTICHIP PA...
- Publication number 20220013505
- Publication date Jan 13, 2022
- Intel Corporation
- Saravanan Sethuraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR ERROR CORRECTION CODE CIRCUITRY
- Publication number 20210151120
- Publication date May 20, 2021
- Intel Corporation
- Hwa Chaw Law
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUS FOR MANAGING THERMAL BEHAVIOR IN MULTICHIP P...
- Publication number 20200105722
- Publication date Apr 2, 2020
- Intel Corporation
- Saravanan Sethuraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC MAJOR MODE FOR EFFICIENT MEMORY TRAFFIC CONTROL
- Publication number 20190303039
- Publication date Oct 3, 2019
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable Network-on-Chip for High-Bandwidth Memory
- Publication number 20190138493
- Publication date May 9, 2019
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR USING MEMORY COMMANDS
- Publication number 20120260032
- Publication date Oct 11, 2012
- Altera Corporation
- Gordon Raymond Chiu
- G06 - COMPUTING CALCULATING COUNTING

Yu Ying Ong

Person

Patents Grantslast 30 patents

Modular error correction code circuitry

Scalable network-on-chip for high-bandwidth memory

Memory controller system and a method of pre-scheduling memory tran...

Methods and apparatus for managing thermal behavior in multichip pa...

Memory controller system and a method for memory scheduling of a st...

Scalable network-on-chip for high-bandwidth memory

Clocking system and a method of clock synchronization

Dynamic major mode for efficient memory traffic control

Methods and apparatus for managing thermal behavior in multichip pa...

Integrated circuits with improved memory controllers

System and methods for adjusting memory command placement

Memory interface with hybrid error detection circuitry for modular...

Systems and methods for using memory commands

Patents Applicationslast 30 patents

NETWORK-ON-CHIP PACKETIZATION AND ROUTING METHOD AND APPARATUS FOR...

Scalable Network-on-Chip for High-Bandwidth Memory

METHOD AND A SYSTEM FOR NETWORK-ON-CHIP ARBITRATION

METHOD OF DEBUGGING NETWORK-ON-CHIP

Scalable Network-on-Chip for High-Bandwidth Memory

MEMORY CONTROLLER SYSTEM AND A METHOD OF PRE-SCHEDULING MEMORY TRAN...

NETWORK-ON-CHIP SYSTEM FOR OPTIMIZING DATA TRANSFER

MEMORY CONTROLLER FOR IMPROVING DATA INTEGRITY AND PROVIDING DATA S...

CLOCKING SYSTEM AND A METHOD OF CLOCK SYNCHRONIZATION

MEMORY CONTROLLER SYSTEM AND A METHOD FOR MEMORY SCHEDULING OF A ST...

METHODS AND APPARATUS FOR MANAGING THERMAL BEHAVIOR IN MULTICHIP PA...

MODULAR ERROR CORRECTION CODE CIRCUITRY

METHODS AND APPARATUS FOR MANAGING THERMAL BEHAVIOR IN MULTICHIP P...

DYNAMIC MAJOR MODE FOR EFFICIENT MEMORY TRAFFIC CONTROL

Scalable Network-on-Chip for High-Bandwidth Memory

SYSTEMS AND METHODS FOR USING MEMORY COMMANDS