Yue Yang

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Palo Alto, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Technologies for controlling jitter at network packet egress
- Patent number 11,108,697
- Issue date Aug 31, 2021
- Intel Corporation
- Chih-Jen Chang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Shaping of post-scheduling network pipeline jitter
- Patent number 10,812,402
- Issue date Oct 20, 2020
- Intel Corporation
- Robert Southworth
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
SHAPING OF POST-SCHEDULING NETWORK PIPELINE JITTER
- Publication number 20190140964
- Publication date May 9, 2019
- Robert Southworth
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNOLOGIES FOR CONTROLLING JITTER AT NETWORK PACKET EGRESS
- Publication number 20190044867
- Publication date Feb 7, 2019
- Intel Corporation
- Chih-Jen Chang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE