Yue Yu

Person

Johns Creek, GA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Support for multiple widths of DRAM in double data rate controllers...
- Patent number 10,956,349
- Issue date Mar 23, 2021
- Integrated Device Technology, Inc.
- Alejandro F. Gonzalez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wide programmable gain receiver data path for single-ended memory i...
- Patent number 10,872,054
- Issue date Dec 22, 2020
- Integrated Device Technology, Inc.
- Yi Xie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Command sequence response in a memory data buffer
- Patent number 10,671,300
- Issue date Jun 2, 2020
- Intergrated Device Technology, Inc.
- Craig DeSimone
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Double data rate controllers and data buffers with support for mult...
- Patent number 10,565,144
- Issue date Feb 18, 2020
- Integrated Device Technology, Inc.
- Alejandro F. Gonzalez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wide programmable gain receiver data path for single-ended memory i...
- Patent number 10,496,587
- Issue date Dec 3, 2019
- Integrated Device Technology, Inc.
- Yi Xie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High signal voltage tolerance in single-ended memory interface
- Patent number 10,304,520
- Issue date May 28, 2019
- Integrated Device Technology, Inc.
- Yi Xie
- G11 - INFORMATION STORAGE
Information Patent Grant
Signal driver slew rate control
- Patent number 10,236,870
- Issue date Mar 19, 2019
- Integrated Device Technology, Inc.
- Zhigang Hu
- G11 - INFORMATION STORAGE
Information Patent Grant
Command sequence response in a memory data buffer
- Patent number 10,198,200
- Issue date Feb 5, 2019
- Integrated Device Technology, Inc.
- Craig DeSimone
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asymmetric on-state resistance driver optimized for multi-drop DDR4
- Patent number 10,171,268
- Issue date Jan 1, 2019
- Integrated Device Technology, Inc.
- Yue Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asymmetrical emphasis in a memory data bus driver
- Patent number 9,905,287
- Issue date Feb 27, 2018
- Integrated Device Technology, Inc.
- Yanbo Wang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Inferring sampled data in decision feedback equalizer at restart of...
- Patent number 9,860,088
- Issue date Jan 2, 2018
- Intergrated Device Technology, Inc.
- Craig DeSimone
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Signal driver slew rate control
- Patent number 9,853,632
- Issue date Dec 26, 2017
- Integrated Device Technology, Inc.
- Zhigang Hu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Asymmetric on-state resistance driver optimized for multi-drop DDR4
- Patent number 9,794,087
- Issue date Oct 17, 2017
- Integrated Device Technology, Inc.
- Yue Yu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Asymmetrical emphasis in a memory data bus driver
- Patent number 9,653,147
- Issue date May 16, 2017
- Integrated Device Technology Inc.
- Yanbo Wang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Single-ended memory signal equalization at power up
- Patent number 9,589,626
- Issue date Mar 7, 2017
- Integrated Device Technology, Inc.
- HaiQi Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for a low power AC On-Die-Termination (ODT) ci...
- Patent number 8,410,813
- Issue date Apr 2, 2013
- Integrated Device Technology, Inc.
- Liang Leon Zhang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit including current-mode logic driver with multi-rate program...
- Patent number 8,248,135
- Issue date Aug 21, 2012
- Integrated Device Technology, Inc.
- Yue Yu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
A Low-Power Output Driver for Power-Supply Termination in Memory In...
- Publication number 20230410881
- Publication date Dec 21, 2023
- Renesas Electronics America Inc.
- Haifeng Yin
- G11 - INFORMATION STORAGE
Information Patent Application
SUPPORT FOR MULTIPLE WIDTHS OF DRAM IN DOUBLE DATA RATE CONTROLLERS...
- Publication number 20200117629
- Publication date Apr 16, 2020
- Integrated Device Technology, Inc.
- Alejandro F. Gonzalez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WIDE PROGRAMMABLE GAIN RECEIVER DATA PATH FOR SINGLE-ENDED MEMORY I...
- Publication number 20200057744
- Publication date Feb 20, 2020
- Integrated Device Technology, Inc.
- Yi Xie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUPPORT FOR MULTIPLE WIDTHS OF DRAM IN DOUBLE DATA RATE CONTROLLERS...
- Publication number 20190129879
- Publication date May 2, 2019
- Integrated Device Technology, Inc.
- Alejandro F. Gonzalez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL DRIVER SLEW RATE CONTROL
- Publication number 20180102771
- Publication date Apr 12, 2018
- Integrated Device Technology, Inc.
- Zhigang Hu
- G11 - INFORMATION STORAGE
Information Patent Application
ASYMMETRIC ON-STATE RESISTANCE DRIVER OPTIMIZED FOR MULTI-DROP DDR4
- Publication number 20170373886
- Publication date Dec 28, 2017
- Integrated Device Technology, Inc.
- Yue Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYMMETRIC ON-STATE RESISTANCE DRIVER OPTIMIZED FOR MULTI-DROP DDR4
- Publication number 20170256303
- Publication date Sep 7, 2017
- Integrated Device Technology, Inc.
- Yue Yu
- G11 - INFORMATION STORAGE
Information Patent Application
ASYMMETRICAL EMPHASIS IN A MEMORY DATA BUS DRIVER
- Publication number 20170212847
- Publication date Jul 27, 2017
- Integrated Device Technology, Inc.
- Yanbo Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL DRIVER SLEW RATE CONTROL
- Publication number 20170201243
- Publication date Jul 13, 2017
- Integrated Device Technology, Inc.
- Zhigang Hu
- G11 - INFORMATION STORAGE
Information Patent Application
ASYMMETRICAL EMPHASIS IN A MEMORY DATA BUS DRIVER
- Publication number 20170162251
- Publication date Jun 8, 2017
- Integrated Device Technology, Inc.
- Yanbo Wang
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Apparatus for A Low Power AC On-Die-Termination (ODT) Ci...
- Publication number 20120299617
- Publication date Nov 29, 2012
- Integrated Device Technology, Inc.
- Liang Leon Zhang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CIRCUIT INCLUDING CURRENT-MODE LOGIC DRIVER WITH MULTI-RATE PROGRAM...
- Publication number 20110175656
- Publication date Jul 21, 2011
- Integrated Device Technology, Inc.
- Yue Yu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Person

Patents Grantslast 30 patents

Support for multiple widths of DRAM in double data rate controllers...

Wide programmable gain receiver data path for single-ended memory i...

Command sequence response in a memory data buffer

Double data rate controllers and data buffers with support for mult...

Wide programmable gain receiver data path for single-ended memory i...

High signal voltage tolerance in single-ended memory interface

Signal driver slew rate control

Command sequence response in a memory data buffer

Asymmetric on-state resistance driver optimized for multi-drop DDR4

Asymmetrical emphasis in a memory data bus driver

Inferring sampled data in decision feedback equalizer at restart of...

Signal driver slew rate control

Asymmetric on-state resistance driver optimized for multi-drop DDR4

Asymmetrical emphasis in a memory data bus driver

Single-ended memory signal equalization at power up

Method and apparatus for a low power AC On-Die-Termination (ODT) ci...

Circuit including current-mode logic driver with multi-rate program...

Patents Applicationslast 30 patents

A Low-Power Output Driver for Power-Supply Termination in Memory In...

SUPPORT FOR MULTIPLE WIDTHS OF DRAM IN DOUBLE DATA RATE CONTROLLERS...

WIDE PROGRAMMABLE GAIN RECEIVER DATA PATH FOR SINGLE-ENDED MEMORY I...

SUPPORT FOR MULTIPLE WIDTHS OF DRAM IN DOUBLE DATA RATE CONTROLLERS...

SIGNAL DRIVER SLEW RATE CONTROL

ASYMMETRIC ON-STATE RESISTANCE DRIVER OPTIMIZED FOR MULTI-DROP DDR4

ASYMMETRIC ON-STATE RESISTANCE DRIVER OPTIMIZED FOR MULTI-DROP DDR4

ASYMMETRICAL EMPHASIS IN A MEMORY DATA BUS DRIVER

SIGNAL DRIVER SLEW RATE CONTROL

ASYMMETRICAL EMPHASIS IN A MEMORY DATA BUS DRIVER

Method and Apparatus for A Low Power AC On-Die-Termination (ODT) Ci...

CIRCUIT INCLUDING CURRENT-MODE LOGIC DRIVER WITH MULTI-RATE PROGRAM...