Yuichi Nakatani

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Sendai, JP

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Patents Grantslast 30 patents

Information Patent Grant
Method of selecting cells for input code in a digital-to-analog con...
- Patent number 6,788,234
- Issue date Sep 7, 2004
- FREESCALE SEMICONDUCTOR, INC.
- Masami Aiura
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital-to-analog-converter
- Patent number 6,686,859
- Issue date Feb 3, 2004
- Motorola, Inc.
- Masami Aiura
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital-to-analog conversion circuit
- Patent number 6,346,901
- Issue date Feb 12, 2002
- Motorola, Inc.
- Masami Aiura
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Offset cancellation circuit
- Patent number 5,977,892
- Issue date Nov 2, 1999
- Motorola, Inc.
- Yuichi Nakatani
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-bit A/D converter having reduced circuitry
- Patent number 5,757,303
- Issue date May 26, 1998
- Motorola, Inc.
- Yuichi Nakatani
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Method of selecting cells for input code in a digital-to-analog con...
- Publication number 20030169194
- Publication date Sep 11, 2003
- Masami Aiura
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Digital-to-analog-converter
- Publication number 20030151536
- Publication date Aug 14, 2003
- Masami Aiura
- H03 - BASIC ELECTRONIC CIRCUITRY