Yuri Ryabinin

Person

Beer-Sheva, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Configurable arithmetic HW accelerator
- Patent number 12,131,058
- Issue date Oct 29, 2024
- SanDisk Technologies, Inc.
- Yuri Ryabinin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface bus speed optimization
- Patent number 11,984,192
- Issue date May 14, 2024
- Western Digital Technologies, Inc.
- Mordekhay Zehavi
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and device for simultaneously decoding data in parallel to i...
- Patent number 11,487,544
- Issue date Nov 1, 2022
- Western Digital Technologies, Inc.
- Shay Benisty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decoder for irregular error correcting codes
- Patent number 11,190,219
- Issue date Nov 30, 2021
- Western Digital Technologies, Inc.
- Ran Zamir
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
ECC decoder with selective component disabling based on decoding me...
- Patent number 10,565,040
- Issue date Feb 18, 2020
- Western Digital Technologies, Inc.
- Yuri Ryabinin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable ECC decoder
- Patent number 10,530,393
- Issue date Jan 7, 2020
- Western Digital Technologies, Inc.
- Yuri Ryabinin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
ECC decoder with multiple decoding modes
- Patent number 10,218,384
- Issue date Feb 26, 2019
- SanDisk Technologies LLC
- Eran Sharon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage device operations based on bit error rate (BER) estimate
- Patent number 10,180,874
- Issue date Jan 15, 2019
- Western Digital Technologies, Inc.
- Alexander Bazarsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage module and method for datapath bypass
- Patent number 9,905,314
- Issue date Feb 27, 2018
- SanDisk Technologies LLC
- Daniel E. Tuers
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage device operations based on bit error rate (BER) estimate
- Patent number 9,886,342
- Issue date Feb 6, 2018
- SanDisk Technologies LLC
- Yuri Ryabinin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
On-the-fly syndrome and syndrome weight computation architecture fo...
- Patent number 9,768,807
- Issue date Sep 19, 2017
- SanDisk Technologies LLC
- Xinmiao Zhang
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Configurable Arithmetic HW Accelerator
- Publication number 20240427521
- Publication date Dec 26, 2024
- SANDISK TECHNOLOGIES, INC.
- Yuri RYABININ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interface Bus Speed Optimization
- Publication number 20230410858
- Publication date Dec 21, 2023
- Western Digital Technologies, Inc.
- Mordekhay Zehavi
- G11 - INFORMATION STORAGE
Information Patent Application
Configurable Arithmetic HW Accelerator
- Publication number 20230342070
- Publication date Oct 26, 2023
- Western Digital Technologies, Inc.
- Yuri RYABININ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Device for Simultaneously Decoding Data in Parallel to I...
- Publication number 20210216326
- Publication date Jul 15, 2021
- Western Digital Technologies, Inc.
- Shay BENISTY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ECC DECODER WITH MULTIPLE DECODING MODES
- Publication number 20180159556
- Publication date Jun 7, 2018
- Western Digital Technologies, Inc.
- Yan Dumchin
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
ECC DECODER WITH SELECTIVE COMPONENT DISABLING BASED ON DECODING ME...
- Publication number 20180157551
- Publication date Jun 7, 2018
- Western Digital Technologies, Inc.
- YURI RYABININ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ECC DECODER WITH MULTIPLE DECODING MODES
- Publication number 20180159553
- Publication date Jun 7, 2018
- SANDISK TECHNOLOGIES LLC
- ERAN SHARON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE ECC DECODER
- Publication number 20180159555
- Publication date Jun 7, 2018
- Western Digital Technologies, Inc.
- Yuri Ryabinin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
STORAGE DEVICE OPERATIONS BASED ON BIT ERROR RATE (BER) ESTIMATE
- Publication number 20170269991
- Publication date Sep 21, 2017
- Western Digital Technologies, Inc.
- Alexander Bazarsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE DEVICE OPERATIONS BASED ON BIT ERROR RATE (BER) ESTIMATE
- Publication number 20170123898
- Publication date May 4, 2017
- SANDISK TECHNOLOGIES INC.
- Yuri Ryabinin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-THE-FLY SYNDROME AND SYNDROME WEIGHT COMPUTATION ARCHITECTURE FO...
- Publication number 20170063400
- Publication date Mar 2, 2017
- SanDisk Technologies Inc.
- XINMIAO ZHANG
- G06 - COMPUTING CALCULATING COUNTING

Yuri Ryabinin

Person

Patents Grantslast 30 patents

Configurable arithmetic HW accelerator

Interface bus speed optimization

Method and device for simultaneously decoding data in parallel to i...

Decoder for irregular error correcting codes

ECC decoder with selective component disabling based on decoding me...

Configurable ECC decoder

ECC decoder with multiple decoding modes

Storage device operations based on bit error rate (BER) estimate

Storage module and method for datapath bypass

Storage device operations based on bit error rate (BER) estimate

On-the-fly syndrome and syndrome weight computation architecture fo...

Patents Applicationslast 30 patents

Configurable Arithmetic HW Accelerator

Interface Bus Speed Optimization

Configurable Arithmetic HW Accelerator

Method and Device for Simultaneously Decoding Data in Parallel to I...

ECC DECODER WITH MULTIPLE DECODING MODES

ECC DECODER WITH SELECTIVE COMPONENT DISABLING BASED ON DECODING ME...

ECC DECODER WITH MULTIPLE DECODING MODES

CONFIGURABLE ECC DECODER

STORAGE DEVICE OPERATIONS BASED ON BIT ERROR RATE (BER) ESTIMATE

STORAGE DEVICE OPERATIONS BASED ON BIT ERROR RATE (BER) ESTIMATE

ON-THE-FLY SYNDROME AND SYNDROME WEIGHT COMPUTATION ARCHITECTURE FO...