Yusuf Cagatay Tekmen

Person

Raleigh, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Reach matrix scheduler circuit for scheduling instructions to be ex...
- Patent number 11,803,389
- Issue date Oct 31, 2023
- Microsoft Technology Licensing, LLC
- Yusuf Cagatay Tekmen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, and system for reducing live readiness calculati...
- Patent number 11,669,333
- Issue date Jun 6, 2023
- QUALCOMM Incorporated
- Rodney Wayne Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combining load or store instructions
- Patent number 11,593,117
- Issue date Feb 28, 2023
- QUALCOMM Incorporated
- Harsh Thakker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operand pool instruction reservation clustering in a scheduler circ...
- Patent number 11,392,410
- Issue date Jul 19, 2022
- Microsoft Technology Licensing, LLC
- Shivam Priyadarshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Opportunistic consumer instruction steering based on producer instr...
- Patent number 11,327,763
- Issue date May 10, 2022
- Microsoft Technology Licensing, LLC
- Arthur Perais
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing flush recovery using parallel walks of sliced reorder bu...
- Patent number 11,113,068
- Issue date Sep 7, 2021
- Microsoft Technology Licensing, LLC
- Yusuf Cagatay Tekmen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Recovering register mapping state of a flushed instruction employin...
- Patent number 11,061,677
- Issue date Jul 13, 2021
- Microsoft Technology Licensing, LLC
- Kiran Ravi Seth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latency-based instruction reservation station clustering in a sched...
- Patent number 11,023,243
- Issue date Jun 1, 2021
- Microsoft Technology Licensing, LLC
- Yusuf Cagatay Tekmen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operand-based reach explicit dataflow processors, and related metho...
- Patent number 10,956,162
- Issue date Mar 23, 2021
- Microsoft Technology Licensing, LLC
- Robert Douglas Clancy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling early execution of move-immediate instructions having vari...
- Patent number 10,896,041
- Issue date Jan 19, 2021
- Microsoft Technology Licensing, LLC
- Shivam Priyadarshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Minimizing traversal of a processor reorder buffer (ROB) for regist...
- Patent number 10,877,768
- Issue date Dec 29, 2020
- Microsoft Technology Licensing, LLC
- Shivam Priyadarshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing late physical register allocation and early physical regi...
- Patent number 10,860,328
- Issue date Dec 8, 2020
- QUALCOMM Incorporated
- Shivam Priyadarshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast reuse of physical register names
- Patent number 10,514,921
- Issue date Dec 24, 2019
- QUALCOMM Incorporated
- Tejaswi Talluru
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with a coprocessor having early access to not-yet issued...
- Patent number 9,304,774
- Issue date Apr 5, 2016
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid queue for storing instructions from fetch queue directly in...
- Patent number 9,164,772
- Issue date Oct 20, 2015
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PROCESSORS EMPLOYING MEMORY DATA BYPASSING IN MEMORY DATA DEPENDENT...
- Publication number 20220398100
- Publication date Dec 15, 2022
- Microsoft Technology Licensing, LLC
- Yusuf Cagatay Tekmen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPPORTUNISTIC CONSUMER INSTRUCTION STEERING BASED ON PRODUCER INSTR...
- Publication number 20210389951
- Publication date Dec 16, 2021
- Microsoft Technology Licensing, LLC
- Arthur PERAIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERAND POOL INSTRUCTION RESERVATION CLUSTERING IN A SCHEDULER CIRC...
- Publication number 20210318905
- Publication date Oct 14, 2021
- Microsoft Technology Licensing, LLC
- Shivam PRIYADARSHI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REACH MATRIX SCHEDULER CIRCUIT FOR SCHEDULING OF INSTRUCTIONS TO BE...
- Publication number 20210216327
- Publication date Jul 15, 2021
- Microsoft Technology Licensing, LLC
- Yusuf Cagatay TEKMEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LATENCY-BASED INSTRUCTION RESERVATION CLUSTERING IN A SCHEDULER CIR...
- Publication number 20210026639
- Publication date Jan 28, 2021
- Microsoft Technology Licensing, LLC
- Yusuf Cagatay TEKMEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERAND-BASED REACH EXPLICIT DATAFLOW PROCESSORS, AND RELATED METHO...
- Publication number 20200409712
- Publication date Dec 31, 2020
- Microsoft Technology Licensing, LLC
- Robert Douglas CLANCY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING LATE PHYSICAL REGISTER ALLOCATION AND EARLY PHYSICAL REGI...
- Publication number 20200097296
- Publication date Mar 26, 2020
- QUALCOMM Incorporated
- Shivam Priyadarshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINING LOAD OR STORE INSTRUCTIONS
- Publication number 20200004550
- Publication date Jan 2, 2020
- QUALCOMM Incorporated
- Harsh THAKKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR REDUCING LIVE READINESS CALCULATI...
- Publication number 20190332385
- Publication date Oct 31, 2019
- QUALCOMM Incorporated
- Rodney Wayne SMITH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING EARLY PIPELINE OPTIMIZATION OF CONDITIONAL INSTRUCTIONS I...
- Publication number 20190294443
- Publication date Sep 26, 2019
- QUALCOMM Incorporated
- Sandeep Suresh Navada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAST REUSE OF PHYSICAL REGISTER NAMES
- Publication number 20190073218
- Publication date Mar 7, 2019
- QUALCOMM Incorporated
- Tejaswi TALLURU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT HANDLING OF REGISTER FILES
- Publication number 20170046160
- Publication date Feb 16, 2017
- QUALCOMM Incorporated
- Kiran Ravi SETH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH PERFORMANCE RECOVERY FROM MISSPECULATION OF LOAD LATENCY
- Publication number 20170046164
- Publication date Feb 16, 2017
- QUALCOMM Incorporated
- Raghavan MADHAVAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor with Hazard Tracking Employing Register Range Compares
- Publication number 20130173886
- Publication date Jul 4, 2013
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor with a Coprocessor having Early Access to Not-Yet Issued...
- Publication number 20120204005
- Publication date Aug 9, 2012
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor with a Hybrid Instruction Queue with Instruction Elaborat...
- Publication number 20120204008
- Publication date Aug 9, 2012
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor with a Hybrid Instruction Queue
- Publication number 20120204004
- Publication date Aug 9, 2012
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING

Yusuf Cagatay Tekmen

Person

Patents Grantslast 30 patents

Reach matrix scheduler circuit for scheduling instructions to be ex...

Method, apparatus, and system for reducing live readiness calculati...

Combining load or store instructions

Operand pool instruction reservation clustering in a scheduler circ...

Opportunistic consumer instruction steering based on producer instr...

Performing flush recovery using parallel walks of sliced reorder bu...

Recovering register mapping state of a flushed instruction employin...

Latency-based instruction reservation station clustering in a sched...

Operand-based reach explicit dataflow processors, and related metho...

Enabling early execution of move-immediate instructions having vari...

Minimizing traversal of a processor reorder buffer (ROB) for regist...

Providing late physical register allocation and early physical regi...

Fast reuse of physical register names

Processor with a coprocessor having early access to not-yet issued...

Hybrid queue for storing instructions from fetch queue directly in...

Patents Applicationslast 30 patents

PROCESSORS EMPLOYING MEMORY DATA BYPASSING IN MEMORY DATA DEPENDENT...

OPPORTUNISTIC CONSUMER INSTRUCTION STEERING BASED ON PRODUCER INSTR...

OPERAND POOL INSTRUCTION RESERVATION CLUSTERING IN A SCHEDULER CIRC...

REACH MATRIX SCHEDULER CIRCUIT FOR SCHEDULING OF INSTRUCTIONS TO BE...

LATENCY-BASED INSTRUCTION RESERVATION CLUSTERING IN A SCHEDULER CIR...

OPERAND-BASED REACH EXPLICIT DATAFLOW PROCESSORS, AND RELATED METHO...

PROVIDING LATE PHYSICAL REGISTER ALLOCATION AND EARLY PHYSICAL REGI...

COMBINING LOAD OR STORE INSTRUCTIONS

METHOD, APPARATUS, AND SYSTEM FOR REDUCING LIVE READINESS CALCULATI...

PROVIDING EARLY PIPELINE OPTIMIZATION OF CONDITIONAL INSTRUCTIONS I...

FAST REUSE OF PHYSICAL REGISTER NAMES

EFFICIENT HANDLING OF REGISTER FILES

HIGH PERFORMANCE RECOVERY FROM MISSPECULATION OF LOAD LATENCY

Processor with Hazard Tracking Employing Register Range Compares

Processor with a Coprocessor having Early Access to Not-Yet Issued...

Processor with a Hybrid Instruction Queue with Instruction Elaborat...

Processor with a Hybrid Instruction Queue