Yutaka Mizuno

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Yokohama, JP

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Patents Grantslast 30 patents

Information Patent Grant
Layout method and method of manufacturing semiconductor device
- Patent number 9,021,405
- Issue date Apr 28, 2015
- Fujitsu Semiconductor Limited
- Takanori Hiramoto
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
LAYOUT METHOD AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
- Publication number 20120329266
- Publication date Dec 27, 2012
- FUJITSU SEMICONDUCTOR LIMITED
- Takanori Hiramoto
- H01 - BASIC ELECTRIC ELEMENTS