Zer Liang

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Tsukuba, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatuses and methods for controlling data timing in a multi-memo...
- Patent number 11,468,923
- Issue date Oct 11, 2022
- Micron Technology, Inc.
- Tsugio Takahashi
- G11 - INFORMATION STORAGE
Information Patent Grant
Error correction code circuits having one-to-one relationships with...
- Patent number 11,373,725
- Issue date Jun 28, 2022
- Micron Technology, Inc.
- Zer Liang
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for controlling data timing in a multi-memo...
- Patent number 10,748,584
- Issue date Aug 18, 2020
- Micron Technology, Inc.
- Tsugio Takahashi
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for controlling data timing in a multi-memo...
- Patent number 10,109,327
- Issue date Oct 23, 2018
- Micron Technology, Inc.
- Tsugio Takahashi
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for controlling data timing in a multi-memo...
- Patent number 9,715,909
- Issue date Jul 25, 2017
- Micron Technology, Inc.
- Tsugio Takahashi
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for memory command input and control
- Patent number 9,466,348
- Issue date Oct 11, 2016
- Micron Technology, Inc.
- Jacob Robert Anderson
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for memory command input and control
- Patent number 8,913,447
- Issue date Dec 16, 2014
- Micron Technology, Inc.
- Jacob Robert Anderson
- G11 - INFORMATION STORAGE
Information Patent Grant
Data bus power-reduced semiconductor storage apparatus
- Patent number 8,520,452
- Issue date Aug 27, 2013
- Micron Technology, Inc.
- Takuya Nakanishi
- G11 - INFORMATION STORAGE
Information Patent Grant
Data bus power-reduced semiconductor storage apparatus
- Patent number 8,194,474
- Issue date Jun 5, 2012
- Micron Technology, Inc.
- Takuya Nakanishi
- G11 - INFORMATION STORAGE
Information Patent Grant
Data bus power-reduced semiconductor storage apparatus
- Patent number 8,004,909
- Issue date Aug 23, 2011
- Micron Technology, Inc.
- Takuya Nakanishi
- G11 - INFORMATION STORAGE
Information Patent Grant
Data bus power-reduced semiconductor storage apparatus
- Patent number 7,746,710
- Issue date Jun 29, 2010
- Micron Technology, Inc.
- Takuya Nakanishi
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ERROR CORRECTION CODE CIRCUITS HAVING ONE-TO-ONE RELATIONSHIPS WITH...
- Publication number 20210407611
- Publication date Dec 30, 2021
- Micron Technology, Inc.
- Zer Liang
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR CONTROLLING DATA TIMING IN A MULTI-MEMO...
- Publication number 20200342920
- Publication date Oct 29, 2020
- Micron Technology, Inc.
- Tsugio Takahashi
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR CONTROLLING DATA TIMING IN A MULTI-MEMO...
- Publication number 20190035439
- Publication date Jan 31, 2019
- Micron Technology, Inc.
- Tsugio Takahashi
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR CONTROLLING DATA TIMING IN A MULTI-MEMO...
- Publication number 20170287531
- Publication date Oct 5, 2017
- Micron Technology, Inc.
- Tsugio Takahashi
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR MEMORY COMMAND INPUT AND CONTROL
- Publication number 20150092503
- Publication date Apr 2, 2015
- Micron Technology, Inc.
- JACOB ROBERT ANDERSON
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR CONTROLLING DATA TIMING IN A MULTI-MEMO...
- Publication number 20140269121
- Publication date Sep 18, 2014
- Micron Technology, Inc.
- Tsugio Takahashi
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR MEMORY COMMAND INPUT AND CONTROL
- Publication number 20120327728
- Publication date Dec 27, 2012
- Micron Technology, Inc.
- Jacob Robert Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA BUS POWER-REDUCED SEMICONDUCTOR STORAGE APPARATUS
- Publication number 20120230121
- Publication date Sep 13, 2012
- Micron Technoloy, Inc.
- Takuya Nakanishi
- G11 - INFORMATION STORAGE
Information Patent Application
DATA BUS POWER-REDUCED SEMICONDUCTOR STORAGE APPARATUS
- Publication number 20110280089
- Publication date Nov 17, 2011
- Micron Technology, Inc.
- Takuya Nakanishi
- G11 - INFORMATION STORAGE
Information Patent Application
DATA BUS POWER-REDUCED SEMICONDUCTOR STORAGE APPARATUS
- Publication number 20100265776
- Publication date Oct 21, 2010
- Micron Technology, Inc.
- Takuya Nakanishi
- G11 - INFORMATION STORAGE
Information Patent Application
Data bus power-reduced semiconductor storage apparatus
- Publication number 20090180337
- Publication date Jul 16, 2009
- Micron Technology, Inc.
- Takuya Nakanishi
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

Apparatuses and methods for controlling data timing in a multi-memo...

Error correction code circuits having one-to-one relationships with...

Apparatuses and methods for controlling data timing in a multi-memo...

Apparatuses and methods for controlling data timing in a multi-memo...

Apparatuses and methods for controlling data timing in a multi-memo...

Method and apparatus for memory command input and control

Method and apparatus for memory command input and control

Data bus power-reduced semiconductor storage apparatus

Data bus power-reduced semiconductor storage apparatus

Data bus power-reduced semiconductor storage apparatus

Data bus power-reduced semiconductor storage apparatus

Patents Applicationslast 30 patents

ERROR CORRECTION CODE CIRCUITS HAVING ONE-TO-ONE RELATIONSHIPS WITH...

APPARATUSES AND METHODS FOR CONTROLLING DATA TIMING IN A MULTI-MEMO...

APPARATUSES AND METHODS FOR CONTROLLING DATA TIMING IN A MULTI-MEMO...

APPARATUSES AND METHODS FOR CONTROLLING DATA TIMING IN A MULTI-MEMO...

METHOD AND APPARATUS FOR MEMORY COMMAND INPUT AND CONTROL

APPARATUSES AND METHODS FOR CONTROLLING DATA TIMING IN A MULTI-MEMO...

METHOD AND APPARATUS FOR MEMORY COMMAND INPUT AND CONTROL

DATA BUS POWER-REDUCED SEMICONDUCTOR STORAGE APPARATUS

DATA BUS POWER-REDUCED SEMICONDUCTOR STORAGE APPARATUS

DATA BUS POWER-REDUCED SEMICONDUCTOR STORAGE APPARATUS

Data bus power-reduced semiconductor storage apparatus