Zhe Wang

Person

San Antonio, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
System performance management using prioritized compute units
- Patent number 12,314,179
- Issue date May 27, 2025
- Advanced Micro Devices, Inc.
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inter-cluster shared data management in sub-NUMA cluster
- Patent number 12,210,446
- Issue date Jan 28, 2025
- Intel Corporation
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor instructions for data compression and decompression
- Patent number 12,106,104
- Issue date Oct 1, 2024
- Intel Corporation
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Frame pacing for improved experiences in 3D applications
- Patent number 12,057,090
- Issue date Aug 6, 2024
- Intel Corporation
- Travis Schluessler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual machine replication and migration
- Patent number 11,544,093
- Issue date Jan 3, 2023
- Intel Corporation
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Direct mapped caching scheme for a memory side cache that exhibits...
- Patent number 11,526,448
- Issue date Dec 13, 2022
- Intel Corporation
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System performance management using prioritized compute units
- Patent number 11,204,871
- Issue date Dec 21, 2021
- Advanced Micro Devices, Inc.
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to efficiently track locations of dirty cache...
- Patent number 11,074,188
- Issue date Jul 27, 2021
- Intel Corporation
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Caching bypass mechanism for a multi-level memory
- Patent number 11,055,228
- Issue date Jul 6, 2021
- Intel Corporation
- Wei Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache architecture using way ID to reduce near memory traffic in a...
- Patent number 10,884,927
- Issue date Jan 5, 2021
- Intel Corporation
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for multi-level memory early page demotion
- Patent number 10,860,244
- Issue date Dec 8, 2020
- Intel Corporation
- Binh Pham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coarse tag replacement
- Patent number 10,621,094
- Issue date Apr 14, 2020
- Intel Corporation
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Aggregated write back in a direct mapped two level memory
- Patent number 10,496,544
- Issue date Dec 3, 2019
- Intel Corporation
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delegated privileged access grants
- Patent number 10,482,404
- Issue date Nov 19, 2019
- Oracle International Corporation
- Arun Theebaprakasam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus, system, and method to determine a demarcation voltage to...
- Patent number 10,452,312
- Issue date Oct 22, 2019
- Intel Corporation
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Near memory miss prediction to reduce memory access latency
- Patent number 10,417,135
- Issue date Sep 17, 2019
- Intel Corporation
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for unneeded block prediction in a computing s...
- Patent number 10,261,901
- Issue date Apr 16, 2019
- Intel Corporation
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-level system memory with near memory scrubbing based on predi...
- Patent number 10,120,806
- Issue date Nov 6, 2018
- Intel Corporation
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for pre-fetching data in a system having a mul...
- Patent number 10,108,549
- Issue date Oct 23, 2018
- Intel Corporation
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-level memory management
- Patent number 9,921,961
- Issue date Mar 20, 2018
- Intel Corporation
- Christopher B. Wilkerson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhancing lifetime of non-volatile cache by injecting random replac...
- Patent number 9,792,228
- Issue date Oct 17, 2017
- Advanced Micro Devices, Inc.
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhancing lifetime of non-volatile cache by reducing intra-block wr...
- Patent number 9,767,043
- Issue date Sep 19, 2017
- Advanced Micro Devices, Inc.
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Privileged account plug-in framework-step-up validation
- Patent number 9,674,168
- Issue date Jun 6, 2017
- Oracle International Corporation
- Buddhika Kottahachchi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Privileged account plug-in framework—network—connected objects
- Patent number 9,667,610
- Issue date May 30, 2017
- Oracle International Corporation
- Arun Theebaprakasam
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multi-level memory management
- Patent number 9,583,182
- Issue date Feb 28, 2017
- Intel Corporation
- Christopher B. Wilkerson
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus related to cache memory
- Patent number 9,552,301
- Issue date Jan 24, 2017
- Advanced Micro Devices, Inc.
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus related to data processors and caches incorpo...
- Patent number 9,317,448
- Issue date Apr 19, 2016
- Advanced Micro Devices, Inc.
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DYNAMIC CACHE COHERENCE PROTOCOL BASED ON RUNTIME INTERCONNECT UTIL...
- Publication number 20240303195
- Publication date Sep 12, 2024
- Intel Corporation
- Keqiang Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTER-CLUSTER SHARED DATA MANAGEMENT IN SUB-NUMA CLUSTER
- Publication number 20240152448
- Publication date May 9, 2024
- Intel Corporation
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARED PREFETCH INSTRUCTION AND SUPPORT
- Publication number 20230101512
- Publication date Mar 30, 2023
- Intel Corporation
- Christopher HUGHES
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR INSTRUCTIONS FOR DATA COMPRESSION AND DECOMPRESSION
- Publication number 20220197642
- Publication date Jun 23, 2022
- Intel Corporation
- Zhe WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FRAME PACING FOR IMPROVED EXPERIENCES IN 3D APPLICATIONS
- Publication number 20220122566
- Publication date Apr 21, 2022
- Intel Corporation
- Travis Schluessler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM PERFORMANCE MANAGEMENT USING PRIORITIZED COMPUTE UNITS
- Publication number 20220114097
- Publication date Apr 14, 2022
- ADVANCED MICRO DEVICES, INC.
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUAL MACHINE REPLICATION AND MIGRATION
- Publication number 20200042343
- Publication date Feb 6, 2020
- Intel Corporation
- Zhe WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIRECT MAPPED CACHING SCHEME FOR A MEMORY SIDE CACHE THAT EXHIBITS...
- Publication number 20200026655
- Publication date Jan 23, 2020
- Intel Corporation
- Zhe WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS TO EFFICIENTLY TRACK LOCATIONS OF DIRTY CACHE...
- Publication number 20190179764
- Publication date Jun 13, 2019
- Intel Corporation
- Zhe WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-LEVEL SYSTEM MEMORY WITH A BATTERY BACKED UP PORTION OF A NON...
- Publication number 20190163628
- Publication date May 30, 2019
- Intel Corporation
- Zhe WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHING BYPASS MECHANISM FOR A MULTI-LEVEL MEMORY
- Publication number 20190163639
- Publication date May 30, 2019
- Intel Corporation
- Wei A. WU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TAG CACHE ADAPTIVE POWER GATING
- Publication number 20190102314
- Publication date Apr 4, 2019
- Intel Corporation
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEAR MEMORY MISS PREDICTION TO REDUCE MEMORY ACCESS LATENCY
- Publication number 20190095332
- Publication date Mar 28, 2019
- Intel Corporation
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE ARCHITECTURE USING WAY ID TO REDUCE NEAR MEMORY TRAFFIC IN A...
- Publication number 20190042422
- Publication date Feb 7, 2019
- Intel Corporation
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR MULTI-LEVEL MEMORY EARLY PAGE DEMOTION
- Publication number 20190042145
- Publication date Feb 7, 2019
- Intel Corporation
- Binh PHAM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COARSE TAG REPLACEMENT
- Publication number 20190004952
- Publication date Jan 3, 2019
- Intel Corporation
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS, METHOD AND SYSTEM FOR JUST-IN-TIME CACHE ASSOCIATIVITY
- Publication number 20180285274
- Publication date Oct 4, 2018
- Intel Corporation
- Elvira TERAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LINK POWER MANAGEMENT SCHEME BASED ON LINK'S PRIOR HISTORY
- Publication number 20180188797
- Publication date Jul 5, 2018
- Intel Corporation
- Zhe WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS, SYSTEM AND METHOD TO DETERMINE A DEMARCATION VOLTAGE TO...
- Publication number 20180188953
- Publication date Jul 5, 2018
- Intel Corporation
- Zhe WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AGGREGATED WRITE BACK IN A DIRECT MAPPED TWO LEVEL MEMORY
- Publication number 20180189182
- Publication date Jul 5, 2018
- Intel Corporation
- Zhe WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Level System Memory With Near Memory Scrubbing Based On Predi...
- Publication number 20170371795
- Publication date Dec 28, 2017
- Intel Corporation
- Zhe WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-LEVEL MEMORY MANAGEMENT
- Publication number 20170277633
- Publication date Sep 28, 2017
- Intel Corporation
- Christopher B. WILKERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR UNNEEDED BLOCK PREDICTION IN A COMPUTING S...
- Publication number 20170091093
- Publication date Mar 30, 2017
- ZHE WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR PRE-FETCHING DATA IN A SYSTEM HAVING A MUL...
- Publication number 20170083443
- Publication date Mar 23, 2017
- ZHE WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM PERFORMANCE MANAGEMENT USING PRIORITIZED COMPUTE UNITS
- Publication number 20170004080
- Publication date Jan 5, 2017
- Advanced Micro Devices, Inc.
- Zhe Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DELEGATED PRIVILEGED ACCESS GRANTS
- Publication number 20160092802
- Publication date Mar 31, 2016
- ORACLE INTERNATIONAL CORPORATION
- Arun Theebaprakasam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhancing Lifetime of Non-Volatile Cache by Injecting Random Replac...
- Publication number 20150100739
- Publication date Apr 9, 2015
- Advanced Micro Devices, Inc.
- Zhe WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhancing Lifetime of Non-Volatile Cache by Reducing Intra-Block Wr...
- Publication number 20150100735
- Publication date Apr 9, 2015
- Advanced Micro Devices, Inc.
- Zhe WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRIVILEGED ACCOUNT PLUG-IN FRAMEWORK - NETWORK - CONNECTED OBJECTS
- Publication number 20150082396
- Publication date Mar 19, 2015
- ORACLE INTERNATIONAL CORPORATION
- Arun Theebaprakasam
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PRIVILEGED ACCOUNT PLUG-IN FRAMEWORK - STEP-UP VALIDATION
- Publication number 20150082372
- Publication date Mar 19, 2015
- ORACLE INTERNATIONAL CORPORATION
- Buddhika Kottahachchi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Person

Patents Grantslast 30 patents

System performance management using prioritized compute units

Inter-cluster shared data management in sub-NUMA cluster

Processor instructions for data compression and decompression

Frame pacing for improved experiences in 3D applications

Virtual machine replication and migration

Direct mapped caching scheme for a memory side cache that exhibits...

System performance management using prioritized compute units

Method and apparatus to efficiently track locations of dirty cache...

Caching bypass mechanism for a multi-level memory

Cache architecture using way ID to reduce near memory traffic in a...

Method and apparatus for multi-level memory early page demotion

Coarse tag replacement

Aggregated write back in a direct mapped two level memory

Delegated privileged access grants

Apparatus, system, and method to determine a demarcation voltage to...

Near memory miss prediction to reduce memory access latency

Method and apparatus for unneeded block prediction in a computing s...

Multi-level system memory with near memory scrubbing based on predi...

Method and apparatus for pre-fetching data in a system having a mul...

Multi-level memory management

Enhancing lifetime of non-volatile cache by injecting random replac...

Enhancing lifetime of non-volatile cache by reducing intra-block wr...

Privileged account plug-in framework-step-up validation

Privileged account plug-in framework—network—connected objects

Multi-level memory management

Method and apparatus related to cache memory

Methods and apparatus related to data processors and caches incorpo...

Patents Applicationslast 30 patents

DYNAMIC CACHE COHERENCE PROTOCOL BASED ON RUNTIME INTERCONNECT UTIL...

INTER-CLUSTER SHARED DATA MANAGEMENT IN SUB-NUMA CLUSTER

SHARED PREFETCH INSTRUCTION AND SUPPORT

PROCESSOR INSTRUCTIONS FOR DATA COMPRESSION AND DECOMPRESSION

FRAME PACING FOR IMPROVED EXPERIENCES IN 3D APPLICATIONS

SYSTEM PERFORMANCE MANAGEMENT USING PRIORITIZED COMPUTE UNITS

VIRTUAL MACHINE REPLICATION AND MIGRATION

DIRECT MAPPED CACHING SCHEME FOR A MEMORY SIDE CACHE THAT EXHIBITS...

METHOD AND APPARATUS TO EFFICIENTLY TRACK LOCATIONS OF DIRTY CACHE...

MULTI-LEVEL SYSTEM MEMORY WITH A BATTERY BACKED UP PORTION OF A NON...

CACHING BYPASS MECHANISM FOR A MULTI-LEVEL MEMORY

TAG CACHE ADAPTIVE POWER GATING

NEAR MEMORY MISS PREDICTION TO REDUCE MEMORY ACCESS LATENCY

CACHE ARCHITECTURE USING WAY ID TO REDUCE NEAR MEMORY TRAFFIC IN A...

METHOD AND APPARATUS FOR MULTI-LEVEL MEMORY EARLY PAGE DEMOTION

COARSE TAG REPLACEMENT

APPARATUS, METHOD AND SYSTEM FOR JUST-IN-TIME CACHE ASSOCIATIVITY

LINK POWER MANAGEMENT SCHEME BASED ON LINK'S PRIOR HISTORY

APPARATUS, SYSTEM AND METHOD TO DETERMINE A DEMARCATION VOLTAGE TO...

AGGREGATED WRITE BACK IN A DIRECT MAPPED TWO LEVEL MEMORY

Multi-Level System Memory With Near Memory Scrubbing Based On Predi...

MULTI-LEVEL MEMORY MANAGEMENT

METHOD AND APPARATUS FOR UNNEEDED BLOCK PREDICTION IN A COMPUTING S...

METHOD AND APPARATUS FOR PRE-FETCHING DATA IN A SYSTEM HAVING A MUL...

SYSTEM PERFORMANCE MANAGEMENT USING PRIORITIZED COMPUTE UNITS

DELEGATED PRIVILEGED ACCESS GRANTS

Enhancing Lifetime of Non-Volatile Cache by Injecting Random Replac...

Enhancing Lifetime of Non-Volatile Cache by Reducing Intra-Block Wr...

PRIVILEGED ACCOUNT PLUG-IN FRAMEWORK - NETWORK - CONNECTED OBJECTS

PRIVILEGED ACCOUNT PLUG-IN FRAMEWORK - STEP-UP VALIDATION