Zhen Yu GUAN

Person

Hsinchu, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Anti-oxidation layer to prevent dielectric loss from planarization...
- Patent number 12,341,019
- Issue date Jun 24, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Zhen Yu Guan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming bottom electrode via for memory device
- Patent number 12,191,250
- Issue date Jan 7, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Zhen Yu Guan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
In-situ CMP self-assembled monolayer for enhancing metal-dielectric...
- Patent number 12,107,004
- Issue date Oct 1, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd
- Zhen Yu Guan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Anti-oxidation layer to prevent dielectric loss from planarization...
- Patent number 11,854,822
- Issue date Dec 26, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Zhen Yu Guan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
In-situ CMP self-assembled monolayer for enhancing metal-dielectric...
- Patent number 11,810,817
- Issue date Nov 7, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd
- Zhen Yu Guan
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF FORMING BOTTOM ELECTRODE VIA FOR MEMORY DEVICE
- Publication number 20250079299
- Publication date Mar 6, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Zhen Yu Guan
- G11 - INFORMATION STORAGE
Information Patent Application
SUBSTRATE GRINDING TOOL AND METHODS OF OPERATION
- Publication number 20240332026
- Publication date Oct 3, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chi-Fan CHEN
- B24 - GRINDING POLISHING
Information Patent Application
ANTI-OXIDATION LAYER TO PREVENT DIELECTRIC LOSS FROM PLANARIZATION...
- Publication number 20240087906
- Publication date Mar 14, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Zhen Yu Guan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IN-SITU CMP SELF-ASSEMBLED MONOLAYER FOR ENHANCING METAL-DIELECTRIC...
- Publication number 20230377959
- Publication date Nov 23, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Zhen Yu GUAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING BOTTOM ELECTRODE VIA FOR MEMORY DEVICE
- Publication number 20230238318
- Publication date Jul 27, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Zhen Yu Guan
- G11 - INFORMATION STORAGE
Information Patent Application
ANTI-OXIDATION LAYER TO PREVENT DIELECTRIC LOSS FROM PLANARIZATION...
- Publication number 20220293429
- Publication date Sep 15, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Zhen Yu GUAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IN-SITU CMP SELF-ASSEMBLED MONOLAYER FOR ENHANCING METAL-DIELECTRIC...
- Publication number 20220115267
- Publication date Apr 14, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Zhen Yu GUAN
- H01 - BASIC ELECTRIC ELEMENTS

Zhen Yu GUAN

Person

Patents Grantslast 30 patents

Anti-oxidation layer to prevent dielectric loss from planarization...

Method of forming bottom electrode via for memory device

In-situ CMP self-assembled monolayer for enhancing metal-dielectric...

Anti-oxidation layer to prevent dielectric loss from planarization...

In-situ CMP self-assembled monolayer for enhancing metal-dielectric...

Patents Applicationslast 30 patents

METHOD OF FORMING BOTTOM ELECTRODE VIA FOR MEMORY DEVICE

SUBSTRATE GRINDING TOOL AND METHODS OF OPERATION

ANTI-OXIDATION LAYER TO PREVENT DIELECTRIC LOSS FROM PLANARIZATION...

IN-SITU CMP SELF-ASSEMBLED MONOLAYER FOR ENHANCING METAL-DIELECTRIC...

METHOD OF FORMING BOTTOM ELECTRODE VIA FOR MEMORY DEVICE

ANTI-OXIDATION LAYER TO PREVENT DIELECTRIC LOSS FROM PLANARIZATION...

IN-SITU CMP SELF-ASSEMBLED MONOLAYER FOR ENHANCING METAL-DIELECTRIC...