Zhenxin Zhao

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Hangzhou, CN

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Patents Grantslast 30 patents

Information Patent Grant
Method for analyzing static analog integrated circuit layout
- Patent number 12,112,111
- Issue date Oct 8, 2024
- Bayes Electronics Technology Co., Ltd
- Gang Fang
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method for automatic control of simulation error in analog circuit...
- Publication number 20250200262
- Publication date Jun 19, 2025
- Bayes Electronics Technology Co., Ltd
- Gang FANG
- G06 - COMPUTING CALCULATING COUNTING