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Zhi-Min Ling
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Cupertino, CA, US
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Patents Grants
last 30 patents
Information
Patent Grant
Method to break and assemble solar cells
Patent number
8,343,795
Issue date
Jan 1, 2013
Yuhao Luo
Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information
Patent Grant
Method and apparatus for testing a memory device with a redundant s...
Patent number
7,626,874
Issue date
Dec 1, 2009
Xilinx, Inc.
Yuezhen Fan
G11 - INFORMATION STORAGE
Information
Patent Grant
Method of automatic fault isolation in a programmable logic device
Patent number
7,246,285
Issue date
Jul 17, 2007
Xilinx, Inc.
Tarek Eldin
G01 - MEASURING TESTING
Information
Patent Grant
Test circuit for and method of identifying a defect in an integrate...
Patent number
7,227,364
Issue date
Jun 5, 2007
Xilinx, Inc.
Yuezhen Fan
G01 - MEASURING TESTING
Information
Patent Grant
Method and circuits for localizing defective interconnect resources...
Patent number
7,145,344
Issue date
Dec 5, 2006
Xilinx, Inc.
David Mark
G01 - MEASURING TESTING
Information
Patent Grant
Method for monitoring and improving integrated circuit fabrication...
Patent number
7,020,860
Issue date
Mar 28, 2006
Xilinx, Inc.
Joe W. Zhao
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Correlation of electrical test data with physical defect data
Patent number
6,950,771
Issue date
Sep 27, 2005
Xilinx, Inc.
Yuezhen Fan
G11 - INFORMATION STORAGE
Information
Patent Grant
Application-specific testing methods for programmable logic devices
Patent number
6,891,395
Issue date
May 10, 2005
Xilinx, Inc.
Robert W. Wells
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Application-specific testing methods for programmable logic devices
Patent number
6,817,006
Issue date
Nov 9, 2004
Xilinx, Inc.
Robert W. Wells
G01 - MEASURING TESTING
Information
Patent Grant
Method of using partially defective programmable logic devices
Patent number
6,664,808
Issue date
Dec 16, 2003
Xilinx, Inc.
Zhi-Min Ling
G01 - MEASURING TESTING
Information
Patent Grant
Fault emulation testing of programmable logic devices
Patent number
6,594,610
Issue date
Jul 15, 2003
Xilinx, Inc.
Shahin Toutounchi
G01 - MEASURING TESTING
Information
Patent Grant
Methods and structures for protecting reticles from ESD failure
Patent number
6,376,131
Issue date
Apr 23, 2002
Xilinx, Inc.
Jae Cho
G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Patents Applications
last 30 patents
Information
Patent Application
METHOD TO MANAGE A PHOTOVOLTAIC SYSTEM
Publication number
20110088743
Publication date
Apr 21, 2011
Yuhao Luo
H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information
Patent Application
BUILDING-INTEGRATED SOLAR PHOTOVOLTAIC PANEL
Publication number
20110061711
Publication date
Mar 17, 2011
Yuhao Luo
Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information
Patent Application
METHOD TO BREAK AND ASSEMBLE SOLAR CELLS
Publication number
20110065226
Publication date
Mar 17, 2011
Yuhao Luo
Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information
Patent Application
METHOD AND DEVICE FOR FABRICATING A SOLAR CELL USING AN INTERFACE P...
Publication number
20110017263
Publication date
Jan 27, 2011
Solaria Corporation
KEVIN R. GIBSON
Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information
Patent Application
Application-specific testing methods for programmable logic devices
Publication number
20040216081
Publication date
Oct 28, 2004
Xilinx, Inc.
Robert W. Wells
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Method and circuits for localizing defective interconnect resources...
Publication number
20040103354
Publication date
May 27, 2004
Xilinx, Inc.
David Mark
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Application
Method of using partially defective programmable logic devices
Publication number
20030062923
Publication date
Apr 3, 2003
Xilinx, Inc.
Zhi-Min Ling
G01 - MEASURING TESTING