Zhigang Wang

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Sewickley, PA, US

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Patents Grantslast 30 patents

Information Patent Grant
Analog layout module generator and method
- Patent number 7,543,262
- Issue date Jun 2, 2009
- Cadence Design Systems, Inc.
- Zhigang Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Constraint assistant for circuit design
- Patent number 7,418,683
- Issue date Aug 26, 2008
- Cadence Design Systems, Inc.
- Jean-Daniel Sonnard
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Analog layout module generator and method
- Publication number 20070130553
- Publication date Jun 7, 2007
- Cadence Design Systems, Inc.
- Zhigang Wang
- G06 - COMPUTING CALCULATING COUNTING