Accepting numbers of variable word length

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G06F2207/3816

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled

Current Industry

G06F2207/3816Accepting numbers of variable word length

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Patents Grantslast 30 patents

Information Patent Grant
Decomposed floating point multiplication
- Patent number 11,169,776
- Issue date Nov 9, 2021
- Intel Corporation
- Nitin N. Garegrat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable precision floating-point multiplier
- Patent number 10,996,926
- Issue date May 4, 2021
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable precision floating-point multiplier
- Patent number 10,572,222
- Issue date Feb 25, 2020
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mixed-precision floating-point arithmetic circuitry in specialized...
- Patent number 10,521,194
- Issue date Dec 31, 2019
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable precision floating-point multiplier
- Patent number 10,379,815
- Issue date Aug 13, 2019
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating point unit with support for variable length numbers
- Patent number 10,353,670
- Issue date Jul 16, 2019
- Oracle International Corporation
- Jeffrey S Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing fixed and variable length numbers
- Patent number 10,180,819
- Issue date Jan 15, 2019
- Oracle International Corporation
- Jeffrey S Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable precision floating-point multiplier
- Patent number 10,042,607
- Issue date Aug 7, 2018
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating point unit with support for variable length numbers
- Patent number 9,747,073
- Issue date Aug 29, 2017
- Oracle International Corporation
- Jeffrey S Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing fixed and variable length numbers
- Patent number 9,507,564
- Issue date Nov 29, 2016
- Oracle International Corporation
- Jeffrey S Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adding signed 8/16/32-bit integers to 64-bit integers
- Patent number 8,819,622
- Issue date Aug 26, 2014
- Advanced Micro Devices, Inc.
- Thomas M. Deneau
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and methods for determining attributes for arithmetic operat...
- Patent number 8,484,262
- Issue date Jul 9, 2013
- The MathWorks, Inc.
- Tom Bryan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital signal processing apparatus
- Patent number 8,346,830
- Issue date Jan 1, 2013
- Yamaha Corporation
- Yasuyuki Muraki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decimal computing apparatus, electronic device connectable decimal...
- Patent number 8,316,067
- Issue date Nov 20, 2012
- Casio Computer Co., Ltd.
- Hisashi Ito
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating-point number arithmetic circuit for handling immediate values
- Patent number 7,949,696
- Issue date May 24, 2011
- Sony Corporation
- Masaaki Ishii
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modular binary multiplier for signed and unsigned operands of varia...
- Patent number 7,853,635
- Issue date Dec 14, 2010
- International Business Machines Corporation
- Fadi Y. Busaba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic unit of arbitrary precision, operation method for proces...
- Patent number 7,844,654
- Issue date Nov 30, 2010
- Seiko Epson Corporation
- Nobuo Karaki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating-point processor with selectable subprecision
- Patent number 7,725,519
- Issue date May 25, 2010
- Qualcom Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decimal computing apparatus, electronic device connectable decimal...
- Patent number 7,716,267
- Issue date May 11, 2010
- Casio Computer Co., Ltd.
- Hisashi Ito
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of counting leading zeros and counting leading on...
- Patent number 7,584,233
- Issue date Sep 1, 2009
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic unit and method for data storage and reading
- Patent number 7,516,171
- Issue date Apr 7, 2009
- Oki Semiconductor Co., Ltd.
- Teruaki Uehara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modular binary multiplier for signed and unsigned operands of varia...
- Patent number 7,490,121
- Issue date Feb 10, 2009
- International Business Machines Corporation
- Fadi Y. Busaba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid multipliers implemented using DSP circuitry and programmable...
- Patent number 7,269,617
- Issue date Sep 11, 2007
- Altera Corporation
- Benjamin Esposito
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modular binary multiplier for signed and unsigned operands of varia...
- Patent number 7,266,580
- Issue date Sep 4, 2007
- International Business Machines Corporation
- Fadi Y. Busaba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device including multipliers and configurations...
- Patent number 7,216,139
- Issue date May 8, 2007
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device including multipliers and configurations...
- Patent number 7,142,010
- Issue date Nov 28, 2006
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Information processing system, encryption/decryption system, system...
- Patent number 7,117,237
- Issue date Oct 3, 2006
- Seiko Epson Corporation
- Kazuhiko Amano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compiler for enabling multiple signed independent data elements per...
- Patent number 7,039,906
- Issue date May 2, 2006
- International Business Machines Corporation
- Jennifer Q. Trelewicz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing signed multiplication of oper...
- Patent number 6,973,471
- Issue date Dec 6, 2005
- FREESCALE SEMICONDUCTOR, INC.
- Trinh Huy Nguyen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for enabling multiple signed independent data ele...
- Patent number 6,834,337
- Issue date Dec 21, 2004
- International Business Machines Corporation
- Joan Laverne Mitchell
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
VARIABLE PRECISION FLOATING-POINT MULTIPLIER
- Publication number 20200174750
- Publication date Jun 4, 2020
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE PRECISION FLOATING-POINT MULTIPLIER
- Publication number 20190324722
- Publication date Oct 24, 2019
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DECOMPOSED FLOATING POINT MULTIPLICATION
- Publication number 20190324723
- Publication date Oct 24, 2019
- Intel Corporation
- Nitin N. Garegrat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MIXED-PRECISION FLOATING-POINT ARITHMETIC CIRCUITRY IN SPECIALIZED...
- Publication number 20190196786
- Publication date Jun 27, 2019
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE PRECISION FLOATING-POINT MULTIPLIER
- Publication number 20180321909
- Publication date Nov 8, 2018
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLOATING POINT UNIT WITH SUPPORT FOR VARIABLE LENGTH NUMBERS
- Publication number 20170322768
- Publication date Nov 9, 2017
- Jeffrey S. Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING FIXED AND VARIABLE LENGTH NUMBERS
- Publication number 20170046128
- Publication date Feb 16, 2017
- Jeffrey S. Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR DYNAMICALLY REDUCING POWER CONSUMPTION OF FLO...
- Publication number 20140351308
- Publication date Nov 27, 2014
- NVIDIA Corporation
- David C. Tannenbaum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDING SIGNED 8/16/32-BIT INTEGERS TO 64-BIT INTEGERS
- Publication number 20110078653
- Publication date Mar 31, 2011
- Advanced Micro Devices, Inc.
- Thomas M. Deneau
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DECIMAL COMPUTING APPARATUS, ELECTRONIC DEVICE CONNECTABLE DECIMAL...
- Publication number 20090204658
- Publication date Aug 13, 2009
- CASIO COMPUTER CO., LTD.
- Hisashi Ito
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Digital Signal Processing Apparatus
- Publication number 20090106336
- Publication date Apr 23, 2009
- Yamaha Corporation
- Yasuyuki Muraki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR BINARY MULTIPLIER FOR SIGNED AND UNSIGNED OPERANDS OF VARIA...
- Publication number 20070233773
- Publication date Oct 4, 2007
- International Business Machines Corporation
- Fadi Y. Busaba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR BINARY MULTIPLIER FOR SIGNED AND UNSIGNED OPERANDS OF VARIA...
- Publication number 20070214205
- Publication date Sep 13, 2007
- International Business Machines Corporation
- Fadi Y. Busaba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Floating-point processor with selectable subprecision
- Publication number 20070078923
- Publication date Apr 5, 2007
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method of counting leading zeros and counting leading on...
- Publication number 20060294175
- Publication date Dec 28, 2006
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for dynamic session control of digital signal pro...
- Publication number 20060224653
- Publication date Oct 5, 2006
- Kimming So
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Floating-point number arithmetic circuit
- Publication number 20060112160
- Publication date May 25, 2006
- SONY CORPORATION
- Masaaki Ishii
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Arithmetic unit of arbitrary precision, operation method for proces...
- Publication number 20060106903
- Publication date May 18, 2006
- SEIKO EPSON CORPORATION
- Nobuo Karaki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable logic device including multipliers and configurations...
- Publication number 20060103419
- Publication date May 18, 2006
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Decimal computing apparatus, electronic device connectable decimal...
- Publication number 20060047740
- Publication date Mar 2, 2006
- CASIO COMPUTER CO., LTD.
- Hisashi Ito
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CSA tree constellation
- Publication number 20060004903
- Publication date Jan 5, 2006
- Itay Admon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable logic device including multipliers and configurations...
- Publication number 20050038844
- Publication date Feb 17, 2005
- ALTERA CORPORATION, a corporation of Delaware
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIGITAL SIGNAL PROCESSOR BASED ON JUMPING FLOATING-POINT ARITHMETIC
- Publication number 20050010632
- Publication date Jan 13, 2005
- Yung-Chun Lei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Modular binary multiplier for signed and unsigned operands of varia...
- Publication number 20040230631
- Publication date Nov 18, 2004
- International Business Machines Corporation
- Fadi Y. Busaba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data saturation manager and corresponding method
- Publication number 20040167949
- Publication date Aug 26, 2004
- Hyun-Woo Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Arithmetic unit and method for data storage and reading
- Publication number 20040039766
- Publication date Feb 26, 2004
- Teruaki Uehara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for implementing signed multiplication of oper...
- Publication number 20030163503
- Publication date Aug 28, 2003
- Trinh Huy Nguyen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Information processing system, encryption/decryption system, system...
- Publication number 20030147530
- Publication date Aug 7, 2003
- Kazuhiko Amano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable logic device including multipliers and configurations...
- Publication number 20030128049
- Publication date Jul 10, 2003
- ALTERA CORPORATION, a corporation of Delaware
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High-speed computation in arithmetic logic circuit
- Publication number 20030088602
- Publication date May 8, 2003
- Koninklijke Philips Electronics N.V.
- Santanu Dutta
- G06 - COMPUTING CALCULATING COUNTING

Accepting numbers of variable word length

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Decomposed floating point multiplication

Variable precision floating-point multiplier

Variable precision floating-point multiplier

Mixed-precision floating-point arithmetic circuitry in specialized...

Variable precision floating-point multiplier

Floating point unit with support for variable length numbers

Processing fixed and variable length numbers

Variable precision floating-point multiplier

Floating point unit with support for variable length numbers

Processing fixed and variable length numbers

Adding signed 8/16/32-bit integers to 64-bit integers

System and methods for determining attributes for arithmetic operat...

Digital signal processing apparatus

Decimal computing apparatus, electronic device connectable decimal...

Floating-point number arithmetic circuit for handling immediate values

Modular binary multiplier for signed and unsigned operands of varia...

Arithmetic unit of arbitrary precision, operation method for proces...

Floating-point processor with selectable subprecision

Decimal computing apparatus, electronic device connectable decimal...

System and method of counting leading zeros and counting leading on...

Arithmetic unit and method for data storage and reading

Modular binary multiplier for signed and unsigned operands of varia...

Hybrid multipliers implemented using DSP circuitry and programmable...

Modular binary multiplier for signed and unsigned operands of varia...

Programmable logic device including multipliers and configurations...

Programmable logic device including multipliers and configurations...

Information processing system, encryption/decryption system, system...

Compiler for enabling multiple signed independent data elements per...

Method and apparatus for implementing signed multiplication of oper...

System and method for enabling multiple signed independent data ele...

Patents Applicationslast 30 patents

VARIABLE PRECISION FLOATING-POINT MULTIPLIER

VARIABLE PRECISION FLOATING-POINT MULTIPLIER

DECOMPOSED FLOATING POINT MULTIPLICATION

MIXED-PRECISION FLOATING-POINT ARITHMETIC CIRCUITRY IN SPECIALIZED...

VARIABLE PRECISION FLOATING-POINT MULTIPLIER

FLOATING POINT UNIT WITH SUPPORT FOR VARIABLE LENGTH NUMBERS

PROCESSING FIXED AND VARIABLE LENGTH NUMBERS

SYSTEM AND METHOD FOR DYNAMICALLY REDUCING POWER CONSUMPTION OF FLO...

ADDING SIGNED 8/16/32-BIT INTEGERS TO 64-BIT INTEGERS

DECIMAL COMPUTING APPARATUS, ELECTRONIC DEVICE CONNECTABLE DECIMAL...

Digital Signal Processing Apparatus

MODULAR BINARY MULTIPLIER FOR SIGNED AND UNSIGNED OPERANDS OF VARIA...

MODULAR BINARY MULTIPLIER FOR SIGNED AND UNSIGNED OPERANDS OF VARIA...

Floating-point processor with selectable subprecision

System and method of counting leading zeros and counting leading on...

Method and system for dynamic session control of digital signal pro...

Floating-point number arithmetic circuit

Arithmetic unit of arbitrary precision, operation method for proces...

Programmable logic device including multipliers and configurations...

Decimal computing apparatus, electronic device connectable decimal...

CSA tree constellation

Programmable logic device including multipliers and configurations...

DIGITAL SIGNAL PROCESSOR BASED ON JUMPING FLOATING-POINT ARITHMETIC

Modular binary multiplier for signed and unsigned operands of varia...

Data saturation manager and corresponding method

Arithmetic unit and method for data storage and reading

Method and apparatus for implementing signed multiplication of oper...

Information processing system, encryption/decryption system, system...

Programmable logic device including multipliers and configurations...

High-speed computation in arithmetic logic circuit