adapted to multidimensional cache systems

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F12/00Accessing, addressing or allocating within memory systems or architectures

Current Industry

G06F12/128adapted to multidimensional cache systems

Industries

Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus for read-modify-write support in multi-banked...
- Patent number 12,147,353
- Issue date Nov 19, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallelized scrubbing transactions
- Patent number 12,147,301
- Issue date Nov 19, 2024
- Texas Instruments Incorporated
- David Matthew Thompson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache with dynamic allocation of entries
- Patent number 12,141,078
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic disaggregation within a matrix accelerator architecture
- Patent number 12,141,094
- Issue date Nov 12, 2024
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Atomic operations and histogram operations in a cache pipeline
- Patent number 12,141,079
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache coherence shared state suppression
- Patent number 12,135,646
- Issue date Nov 5, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Saving track metadata format information for tracks demoted from ca...
- Patent number 12,135,655
- Issue date Nov 5, 2024
- International Business Machines Corporation
- Kyler A. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic inclusive last level cache
- Patent number 12,111,762
- Issue date Oct 8, 2024
- Intel Corporation
- Ayan Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for eviction in dual datapath victim cache sy...
- Patent number 12,105,640
- Issue date Oct 1, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for cache insertion and cache eviction in a cache system th...
- Patent number 12,105,639
- Issue date Oct 1, 2024
- Dell Products L.P.
- Keyur B. Desai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management
- Patent number 12,099,461
- Issue date Sep 24, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compression techniques
- Patent number 12,093,210
- Issue date Sep 17, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processor operation scheduling for deterministic latency
- Patent number 12,079,155
- Issue date Sep 3, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to facilitate read-modify-write support in a...
- Patent number 12,072,814
- Issue date Aug 27, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Edge cloud system, server and cloud control platform
- Patent number 12,073,715
- Issue date Aug 27, 2024
- CHINA INTELLECTUAL AND CONNECTED VEHICLES (BEIJING) RESEARCH INSTITUTE CO., LTD.
- Wenbo Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache structure and utilization
- Patent number 12,066,975
- Issue date Aug 20, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tag update bus for updated coherence state
- Patent number 12,056,051
- Issue date Aug 6, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handling non-correctable errors
- Patent number 12,019,514
- Issue date Jun 25, 2024
- Texas Instruments Incorporated
- David Matthew Thompson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile architecture for graphics operations
- Patent number 12,013,808
- Issue date Jun 18, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache with write miss merging
- Patent number 12,007,907
- Issue date Jun 11, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable system on a chip
- Patent number 12,007,895
- Issue date Jun 11, 2024
- Apple Inc.
- Per H. Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processors and graphics processing units having dot produc...
- Patent number 12,007,935
- Issue date Jun 11, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache that supports draining write-miss entries
- Patent number 12,001,345
- Issue date Jun 4, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management for detecting cross tile access provid...
- Patent number 11,995,029
- Issue date May 28, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SEDRAM-based stacked cache system and device and controlling method...
- Patent number 11,995,005
- Issue date May 28, 2024
- BEIJING VCORE TECHNOLOGY CO., LTD.
- Jiye Zhao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logging cache line lifetime hints when recording bit-accurate trace
- Patent number 11,989,137
- Issue date May 21, 2024
- Microsoft Technology Licensing, LLC
- Jordi Mola
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
NVMe controller memory manager providing CMB capability
- Patent number 11,960,725
- Issue date Apr 16, 2024
- Western Digital Technologies, Inc.
- Shay Benisty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processors and graphics processing units having dot produc...
- Patent number 11,954,063
- Issue date Apr 9, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic memory reconfiguration
- Patent number 11,954,062
- Issue date Apr 9, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mapping descriptors for read operations
- Patent number 11,947,451
- Issue date Apr 2, 2024
- Micron Technology, Inc.
- Xing Hui Duan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...
- Publication number 20240370380
- Publication date Nov 7, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable System on a Chip
- Publication number 20240370371
- Publication date Nov 7, 2024
- Apple Inc.
- Per H. Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...
- Publication number 20240362180
- Publication date Oct 31, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-tile Memory Management for Detecting Cross Tile Access Provid...
- Publication number 20240345990
- Publication date Oct 17, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TAG UPDATE BUS FOR UPDATED COHERENCE STATE
- Publication number 20240345956
- Publication date Oct 17, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Detecting Modifications To Recently Stored Data
- Publication number 20240345955
- Publication date Oct 17, 2024
- PURE STORAGE, INC.
- Ronald Karr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS
- Publication number 20240320184
- Publication date Sep 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Deduplicating Data Based On Recently Reading The Data
- Publication number 20240320150
- Publication date Sep 26, 2024
- PURE STORAGE, INC.
- Ethan L. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HANDLING NON-CORRECTABLE ERRORS
- Publication number 20240311235
- Publication date Sep 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- David Matthew THOMPSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR ADAPTIVE CACHE CONFIGURATION
- Publication number 20240303204
- Publication date Sep 12, 2024
- Samsung Electronics Co., Ltd.
- Sahand Salamat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE WITH WRITE MISS MERGING
- Publication number 20240296129
- Publication date Sep 5, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MAPPING DESCRIPTORS FOR READ OPERATIONS
- Publication number 20240296116
- Publication date Sep 5, 2024
- Micron Technology, Inc.
- Xing Hui Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS FOR CACHE INSERTION AND CACHE EVICTION IN A CACHE SYSTEM TH...
- Publication number 20240273037
- Publication date Aug 15, 2024
- Dell Products L.P.
- Keyur B. Desai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGGING CACHE LINE LIFETIME HINTS WHEN RECORDING BIT-ACCURATE TRACE
- Publication number 20240264951
- Publication date Aug 8, 2024
- Microsoft Technology Licensing, LLC
- Jordi Mola
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES
- Publication number 20240264952
- Publication date Aug 8, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR DATA ACCESS AND SHARING
- Publication number 20240256483
- Publication date Aug 1, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO REDUCE READ-MODIFY-WRITE CYCLES FOR NON-AL...
- Publication number 20240232100
- Publication date Jul 11, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLASH MEMORY SCHEME CAPABLE OF CONTROLLING FLASH MEMORY DEVICE AUTO...
- Publication number 20240232085
- Publication date Jul 11, 2024
- SILICON MOTION, INC.
- Tsu-Han Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO FACILITATE ATOMIC OPERATIONS IN VICTIM CACHE
- Publication number 20240193098
- Publication date Jun 13, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC MEMORY RECONFIGURATION
- Publication number 20240184739
- Publication date Jun 6, 2024
- Intel Corporation
- Joydeep RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS TO GENERATE A CACHE MISS RATIO CURVE WHERE CACH...
- Publication number 20240152467
- Publication date May 9, 2024
- Huawei Technologies Canada Co., Ltd.
- Sari SULTAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM
- Publication number 20240143516
- Publication date May 2, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE SERVICE FOR PROVIDING ACCESS TO SECRETS IN CONTAINERIZED CLOU...
- Publication number 20240111689
- Publication date Apr 4, 2024
- Microsoft Technology Licensing, LLC
- Bhaskardeep KHAUND
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID VICTIM CACHE AND WRITE MISS BUFFER WITH FENCE OPERATION
- Publication number 20240104026
- Publication date Mar 28, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGGING CACHE LINE LIFETIME HINTS WHEN RECORDING BIT-ACCURATE TRACE
- Publication number 20240095187
- Publication date Mar 21, 2024
- Microsoft Technology Licensing, LLC
- Jordi Mola
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE SIZE CHANGE
- Publication number 20240095169
- Publication date Mar 21, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR UPDATING MEMORY SIDE CACHES IN A MULTI-GPU...
- Publication number 20240086357
- Publication date Mar 14, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION BASED CONTROL OF MEMORY ATTRIBUTES
- Publication number 20240086356
- Publication date Mar 14, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SMART CACHING BASED ON REPUTATION INFORMATION
- Publication number 20240080374
- Publication date Mar 7, 2024
- Open Text Inc.
- Hal Case Lonas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WRITE MERGING ON STORES WITH DIFFERENT PRIVILEGE LEVELS
- Publication number 20240078190
- Publication date Mar 7, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING

adapted to multidimensional cache systems

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Methods and apparatus for read-modify-write support in multi-banked...

Parallelized scrubbing transactions

Victim cache with dynamic allocation of entries

Systolic disaggregation within a matrix accelerator architecture

Atomic operations and histogram operations in a cache pipeline

Cache coherence shared state suppression

Saving track metadata format information for tracks demoted from ca...

Dynamic inclusive last level cache

Methods and apparatus for eviction in dual datapath victim cache sy...

Methods for cache insertion and cache eviction in a cache system th...

Multi-tile memory management

Compression techniques

Graphics processor operation scheduling for deterministic latency

Methods and apparatus to facilitate read-modify-write support in a...

Edge cloud system, server and cloud control platform

Cache structure and utilization

Tag update bus for updated coherence state

Handling non-correctable errors

Multi-tile architecture for graphics operations

Victim cache with write miss merging

Scalable system on a chip

Graphics processors and graphics processing units having dot produc...

Victim cache that supports draining write-miss entries

Multi-tile memory management for detecting cross tile access provid...

SEDRAM-based stacked cache system and device and controlling method...

Logging cache line lifetime hints when recording bit-accurate trace

NVMe controller memory manager providing CMB capability

Graphics processors and graphics processing units having dot produc...

Dynamic memory reconfiguration

Mapping descriptors for read operations

Patents Applicationslast 30 patents

METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...

Scalable System on a Chip

GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...

Multi-tile Memory Management for Detecting Cross Tile Access Provid...

TAG UPDATE BUS FOR UPDATED COHERENCE STATE

Detecting Modifications To Recently Stored Data

MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS

Deduplicating Data Based On Recently Reading The Data

HANDLING NON-CORRECTABLE ERRORS

SYSTEMS AND METHODS FOR ADAPTIVE CACHE CONFIGURATION

VICTIM CACHE WITH WRITE MISS MERGING

MAPPING DESCRIPTORS FOR READ OPERATIONS

METHODS FOR CACHE INSERTION AND CACHE EVICTION IN A CACHE SYSTEM TH...

LOGGING CACHE LINE LIFETIME HINTS WHEN RECORDING BIT-ACCURATE TRACE

VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES

GRAPHICS PROCESSOR DATA ACCESS AND SHARING

METHODS AND APPARATUS TO REDUCE READ-MODIFY-WRITE CYCLES FOR NON-AL...

FLASH MEMORY SCHEME CAPABLE OF CONTROLLING FLASH MEMORY DEVICE AUTO...

METHODS AND APPARATUS TO FACILITATE ATOMIC OPERATIONS IN VICTIM CACHE

DYNAMIC MEMORY RECONFIGURATION

SYSTEMS AND METHODS TO GENERATE A CACHE MISS RATIO CURVE WHERE CACH...

METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM

CACHE SERVICE FOR PROVIDING ACCESS TO SECRETS IN CONTAINERIZED CLOU...

HYBRID VICTIM CACHE AND WRITE MISS BUFFER WITH FENCE OPERATION

LOGGING CACHE LINE LIFETIME HINTS WHEN RECORDING BIT-ACCURATE TRACE

CACHE SIZE CHANGE

SYSTEMS AND METHODS FOR UPDATING MEMORY SIDE CACHES IN A MULTI-GPU...

INSTRUCTION BASED CONTROL OF MEMORY ATTRIBUTES

SMART CACHING BASED ON REPUTATION INFORMATION

WRITE MERGING ON STORES WITH DIFFERENT PRIVILEGE LEVELS