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H03K19/177

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Parent Industries

HELECTRICITY H03Electronic circuits H03KPULSE TECHNIQUE H03K19/00Logic circuits

Current Industry

H03K19/177arranged in matrix form

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Generating physical unclonable function data from a transistor of a...
- Patent number 12,166,482
- Issue date Dec 10, 2024
- Crossbar, Inc.
- Sung Hyun Jo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and circuits for slew-rate calibration
- Patent number 12,166,485
- Issue date Dec 10, 2024
- RAMBUS INC.
- Cosmin Iorga
- G11 - INFORMATION STORAGE
Information Patent Grant
Open-drain bus repeater and system comprising the same
- Patent number 12,164,455
- Issue date Dec 10, 2024
- Nexperia B.V.
- Katarzyna Nowak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reference voltage circuit with temperature compensation
- Patent number 12,160,236
- Issue date Dec 3, 2024
- Infsitronix Technology Corporation
- Yuan-Kai Cheng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Modular periphery tile for integrated circuit device
- Patent number 12,153,866
- Issue date Nov 26, 2024
- Altera Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic drive based on standard commodity FPGA IC chips
- Patent number 12,153,865
- Issue date Nov 26, 2024
- iCometrue Company Ltd.
- Mou-Shiung Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Differential programming of two-terminal memory with program detect...
- Patent number 12,154,624
- Issue date Nov 26, 2024
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
Synthetic aperture image reconstruction system in a patient interfa...
- Patent number 12,144,677
- Issue date Nov 19, 2024
- PHILIPS IMAGE GUIDED THERAPY CORPORATION
- Paul Douglas Corl
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit apparatus and methods for PUF source and generating random...
- Patent number 12,149,641
- Issue date Nov 19, 2024
- INTELLIGENT INFORMATION SECURITY TECHNOLOGY INC.
- Wai-Chi Fang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface circuit and interface device
- Patent number 12,149,245
- Issue date Nov 19, 2024
- SOCIONEXT INC.
- Masayoshi Kinoshita
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configuration latch for programmable logic device
- Patent number 12,149,244
- Issue date Nov 19, 2024
- QuickLogic Corporation
- Ket Chong Yap
- G11 - INFORMATION STORAGE
Information Patent Grant
Training and operations with a double buffered memory topology
- Patent number 12,141,081
- Issue date Nov 12, 2024
- RAMBUS INC.
- Chi-Ming Yeung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for performing logical operations using sen...
- Patent number 12,142,347
- Issue date Nov 12, 2024
- Troy A. Manning
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplexer
- Patent number 12,143,107
- Issue date Nov 12, 2024
- Samsung Electronics Co., Ltd.
- Hyun Ah An
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Physically unclonable function device
- Patent number 12,143,108
- Issue date Nov 12, 2024
- STMicroelectronics (Rousset) SAS
- Francesco La Rosa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit device with embedded programmable logic
- Patent number 12,135,660
- Issue date Nov 5, 2024
- Altera Corporation
- Arifur Rahman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimal timer array
- Patent number 12,135,576
- Issue date Nov 5, 2024
- pSemi Corporation
- Gerald Alcorn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive temperature compensation for a memory device
- Patent number 12,131,795
- Issue date Oct 29, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Grant
Stacked programmable integrated circuitry with smart memory
- Patent number 12,132,482
- Issue date Oct 29, 2024
- Intel Corporation
- Sean Atsatt
- G11 - INFORMATION STORAGE
Information Patent Grant
Power supply switch circuit and operating method thereof
- Patent number 12,132,476
- Issue date Oct 29, 2024
- SAMSUNG ELECTRO-MECHANICS CO., LTD.
- Youngwong Jang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power-up switch-interconnect configuration
- Patent number 12,119,819
- Issue date Oct 15, 2024
- Flex Logix Technologies, Inc.
- Robert I-Che Fu
- G11 - INFORMATION STORAGE
Information Patent Grant
Analog-to-digital conversion circuit and method having remained tim...
- Patent number 12,113,543
- Issue date Oct 8, 2024
- Realtek Semiconductor Corporation
- Shih-Hsiung Huang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Microelectronic circuit capable of selectively activating processin...
- Patent number 12,113,530
- Issue date Oct 8, 2024
- Minima Processor Oy
- Navneet Gupta
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Field programmable gate array with internal phase-locked loop
- Patent number 12,107,587
- Issue date Oct 1, 2024
- HFT Solutions, LLC
- Nima Badizadegan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Application partitioning for locality in a stacked memory system
- Patent number 12,099,453
- Issue date Sep 24, 2024
- NVIDIA Corporation
- William James Dally
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chained programmable delay elements
- Patent number 12,101,092
- Issue date Sep 24, 2024
- EFINIX, INC.
- Marcel Gort
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Anti-aging clock source multiplexing
- Patent number 12,095,459
- Issue date Sep 17, 2024
- QUALCOMM Incorporated
- Kevin Bowles
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable gate array (FPGA) for realizing external monitoring an...
- Patent number 12,095,460
- Issue date Sep 17, 2024
- WUXI ESIONTECH CO., LTD.
- Yueer Shan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device
- Patent number 12,095,461
- Issue date Sep 17, 2024
- Renesas Electronics Corporation
- Daisuke Moriyama
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Security circuit for detecting physical attack on system semiconductor
- Patent number 12,093,434
- Issue date Sep 17, 2024
- Industry Foundation of Chonnam National University
- Young Woo Lee
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
OUTPUT BUFFER FOR A SWAPPABLE SINGLE CONDUCTOR INTERFACE
- Publication number 20240421817
- Publication date Dec 19, 2024
- Murata Manufacturing Co., Ltd.
- Robert Mark ENGLEKIRK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
3D STACKED INTEGRATED CIRCUITS HAVING FAILURE MANAGEMENT
- Publication number 20240421823
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G11 - INFORMATION STORAGE
Information Patent Application
PROCESSOR AND MEMORY COMMUNICATION IN A STACKED MEMORY SYSTEM
- Publication number 20240411709
- Publication date Dec 12, 2024
- NVIDIA Corporation
- William James Dally
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER
- Publication number 20240405781
- Publication date Dec 5, 2024
- Intel Corporation
- Sophia MAERKOVICH
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOGIC FABRIC BASED ON MICROSECTOR INFRASTRUCTURE
- Publication number 20240396556
- Publication date Nov 28, 2024
- Intel Corporation
- Sean R. Atsatt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
EMBEDDED NETWORK ON CHIP ACCESSIBLE TO PROGRAMMABLE LOGIC FABRIC OF...
- Publication number 20240396555
- Publication date Nov 28, 2024
- Intel Corporation
- Sean R. Atsatt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOGIC DRIVE USING STANDARD COMMODITY PROGRAMMABLE LOGIC IC CHIPS CO...
- Publication number 20240380401
- Publication date Nov 14, 2024
- iCometrue Company Ltd.
- Jin-Yuan Lee
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Device For Logic and Memory Co-Optimization
- Publication number 20240380402
- Publication date Nov 14, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jhon Jhy Liaw
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FPGA NEIGHBOR OUTPUT MUX DIRECT CONNECTIONS TO MINIMIZE ROUTING HOPS
- Publication number 20240380684
- Publication date Nov 14, 2024
- EFINIX, INC.
- Marcel Gort
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
REDUCING PARASITIC INTERACTIONS IN A QUBIT GRID FOR SURFACE CODE ER...
- Publication number 20240378473
- Publication date Nov 14, 2024
- Google LLC
- John Martinis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURATION BIT CIRCUIT FOR PROGRAMMABLE LOGIC DEVICE INCLUDING P...
- Publication number 20240371440
- Publication date Nov 7, 2024
- Revol-Ver Inc.
- Sung Lae CHO
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMABLE LOGIC CIRCUIT
- Publication number 20240372551
- Publication date Nov 7, 2024
- SHENZHEN PANGO MICROSYSTEMS CO.,LTD
- CHANGLONG WANG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEM HAVING SINGLE-EVENT LATCH-UP DETECTION AND MITIGATION
- Publication number 20240364342
- Publication date Oct 31, 2024
- NXP USA, Inc.
- Mohamed Suleman Moosa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOGIC DRIVE BASED ON STANDARD COMMODITY FPGA IC CHIPS
- Publication number 20240362386
- Publication date Oct 31, 2024
- iCometrue Company Ltd.
- Mou-Shiung LIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR FABRIC ARCHITECTURE IN FPGA PRODUCTS
- Publication number 20240348253
- Publication date Oct 17, 2024
- Atul Maheshwari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhanced Adaptive Logic Circuitry with Improved Function Coverage a...
- Publication number 20240348252
- Publication date Oct 17, 2024
- Jeffrey Chromczak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMPUTATIONAL UNIT OF A CONFIGURABLE INTEGRATED UNIT INTENDED TO IM...
- Publication number 20240333290
- Publication date Oct 3, 2024
- Airbus Operations SAS
- Pascal MAURERE
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MAIN BOARD, HOT PLUG CONTROL SIGNAL GENERATOR, AND CONTROL SIGNAL G...
- Publication number 20240322827
- Publication date Sep 26, 2024
- Wiwynn Corporation
- Wei-Fang Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR EXPANDING ROUND KEYS DURING DATA ENCRYPTION
- Publication number 20240322828
- Publication date Sep 26, 2024
- SILICON MOTION, INC.
- Wun-Jhe WU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Floating Voltage Suppression in High Speed Multiplexers
- Publication number 20240313780
- Publication date Sep 19, 2024
- PARADE TECHNOLOGIES, LTD.
- Chieh-Yuan Chao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Fabric Die to Fabric Die Interconnect for Modularized Integrated Ci...
- Publication number 20240312909
- Publication date Sep 19, 2024
- Intel Corporation
- Chee Hak Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERFACE SYSTEM AND MEMORY SYSTEM INCLUDING THE SAME
- Publication number 20240313777
- Publication date Sep 19, 2024
- SK HYNIX INC.
- Seung Ho LEE
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROGRAMMABLE LOGIC FABRIC AS DIE TO DIE INTERCONNECT
- Publication number 20240313781
- Publication date Sep 19, 2024
- Xilinx, Inc.
- Brian C. GAIDE
- G01 - MEASURING TESTING
Information Patent Application
IC WITH FIRST AND SECOND FUNCTIONAL CIRCUITS COUPLING ONLY FIRST CI...
- Publication number 20240305299
- Publication date Sep 12, 2024
- TEXAS INSTRUMENTS INCORPORATED
- H. Pooya Forghani-zadeh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
POWER SEQUENCE SYNCHRONIZATION BETWEEN MULTIPLE DEVICES
- Publication number 20240303036
- Publication date Sep 12, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Karl John WALLINGER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHYSICAL UNCLONABLE FUNCTION DEVICE AND METHOD
- Publication number 20240296253
- Publication date Sep 5, 2024
- STMicroelectronics (Rousset) SAS
- Francesco La Rosa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK ACCELERATOR ARCHITECTURE BASED ON CUSTOM INSTRUCTION...
- Publication number 20240272949
- Publication date Aug 15, 2024
- EFINIX, INC.
- Yee Hui LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGIC DRIVE BASED ON MULTICHIP PACKAGE USING INTERCONNECTION BRIDGE
- Publication number 20240266322
- Publication date Aug 8, 2024
- iCometrue Company Ltd.
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INPUT SIGNAL SHAPING FOR A PROGRAMMABLE LOGIC ARRAY
- Publication number 20240267050
- Publication date Aug 8, 2024
- STMicroelectronics (Rousset) SAS
- Jean-Francois LINK
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DATA COMMUNICATION LINK WITH CAPACITOR-BASED PUMPED OUTPUT
- Publication number 20240250677
- Publication date Jul 25, 2024
- BLUE CHEETAH ANALOG DESIGN INC.
- KA YIU LI
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER

arranged in matrix form

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Generating physical unclonable function data from a transistor of a...

Methods and circuits for slew-rate calibration

Open-drain bus repeater and system comprising the same

Reference voltage circuit with temperature compensation

Modular periphery tile for integrated circuit device

Logic drive based on standard commodity FPGA IC chips

Differential programming of two-terminal memory with program detect...

Synthetic aperture image reconstruction system in a patient interfa...

Circuit apparatus and methods for PUF source and generating random...

Interface circuit and interface device

Configuration latch for programmable logic device

Training and operations with a double buffered memory topology

Apparatuses and methods for performing logical operations using sen...

Multiplexer

Physically unclonable function device

Integrated circuit device with embedded programmable logic

Optimal timer array

Adaptive temperature compensation for a memory device

Stacked programmable integrated circuitry with smart memory

Power supply switch circuit and operating method thereof

Power-up switch-interconnect configuration

Analog-to-digital conversion circuit and method having remained tim...

Microelectronic circuit capable of selectively activating processin...

Field programmable gate array with internal phase-locked loop

Application partitioning for locality in a stacked memory system

Chained programmable delay elements

Anti-aging clock source multiplexing

Programmable gate array (FPGA) for realizing external monitoring an...

Semiconductor device

Security circuit for detecting physical attack on system semiconductor

Patents Applicationslast 30 patents

OUTPUT BUFFER FOR A SWAPPABLE SINGLE CONDUCTOR INTERFACE

3D STACKED INTEGRATED CIRCUITS HAVING FAILURE MANAGEMENT

PROCESSOR AND MEMORY COMMUNICATION IN A STACKED MEMORY SYSTEM

SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER

LOGIC FABRIC BASED ON MICROSECTOR INFRASTRUCTURE

EMBEDDED NETWORK ON CHIP ACCESSIBLE TO PROGRAMMABLE LOGIC FABRIC OF...

LOGIC DRIVE USING STANDARD COMMODITY PROGRAMMABLE LOGIC IC CHIPS CO...

Semiconductor Device For Logic and Memory Co-Optimization

FPGA NEIGHBOR OUTPUT MUX DIRECT CONNECTIONS TO MINIMIZE ROUTING HOPS

REDUCING PARASITIC INTERACTIONS IN A QUBIT GRID FOR SURFACE CODE ER...

CONFIGURATION BIT CIRCUIT FOR PROGRAMMABLE LOGIC DEVICE INCLUDING P...

PROGRAMMABLE LOGIC CIRCUIT

SYSTEM HAVING SINGLE-EVENT LATCH-UP DETECTION AND MITIGATION

LOGIC DRIVE BASED ON STANDARD COMMODITY FPGA IC CHIPS

MODULAR FABRIC ARCHITECTURE IN FPGA PRODUCTS

Enhanced Adaptive Logic Circuitry with Improved Function Coverage a...

COMPUTATIONAL UNIT OF A CONFIGURABLE INTEGRATED UNIT INTENDED TO IM...

MAIN BOARD, HOT PLUG CONTROL SIGNAL GENERATOR, AND CONTROL SIGNAL G...

APPARATUS AND METHOD FOR EXPANDING ROUND KEYS DURING DATA ENCRYPTION

Floating Voltage Suppression in High Speed Multiplexers

Fabric Die to Fabric Die Interconnect for Modularized Integrated Ci...

INTERFACE SYSTEM AND MEMORY SYSTEM INCLUDING THE SAME

PROGRAMMABLE LOGIC FABRIC AS DIE TO DIE INTERCONNECT

IC WITH FIRST AND SECOND FUNCTIONAL CIRCUITS COUPLING ONLY FIRST CI...

POWER SEQUENCE SYNCHRONIZATION BETWEEN MULTIPLE DEVICES

PHYSICAL UNCLONABLE FUNCTION DEVICE AND METHOD

NEURAL NETWORK ACCELERATOR ARCHITECTURE BASED ON CUSTOM INSTRUCTION...

LOGIC DRIVE BASED ON MULTICHIP PACKAGE USING INTERCONNECTION BRIDGE

INPUT SIGNAL SHAPING FOR A PROGRAMMABLE LOGIC ARRAY

DATA COMMUNICATION LINK WITH CAPACITOR-BASED PUMPED OUTPUT